High-Performance Parallel Simulation Technology for Advanced Information System Development

先进信息系统开发的高性能并行仿真技术

基本信息

批准号：
17300015
负责人：
NAKASHIMA Hiroshi
金额：
$ 9.63万
依托单位：
Kyoto University (2006-2007)Toyohashi University of Technology (2005)
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
2005
资助国家：
日本
起止时间：
2005 至 2007
项目状态：
已结题

项目摘要

The research has been pursued aiming at the parallelization and performance improvement of cycle accurate simulation (CAS) for advanced IT systems with microprocessors as their key components. The major achievements of the research are the following simulation techniques.1. Our parallelized CAS is combined with an in-order execution simulator to produce approximated partial results of the parallel simulation. In order to avoid that this sequential in-order simulator became a bottleneck, we devised an acceleration technique to generate a simulator specific to each workload automatically. This technique achieves up to 34-fold performance improvement for instruction level simulation.2. We devised a new parallel simulation method in which the process of a simulation is divided into intervals along with time axis so that the intervals me executed in parallel The problem arisen from the dependency between intervals is solved by speculatively executing each interval with approximated partial result of preceding intervals using in-order simulation. As a result, our parallel execution with an eight-node PC cluster achieves up to 5.8-fold speed-up.3. To estimate the worst-case delay caused by interrupts, which is required in the design of real-time systems, we devised O (FN) algorithms to analyze the worst-case miss increments of caches and branch predictors for a workload with N instructions and F interrupts. Furthermore, we devised a O (Nlog N)algorithm to calculate the delay itself accurately using CAS, which can be accelerated by parallelization, up to 9-fold with an eight-node PC cluster.

该研究旨在以微处理器为关键组件的先进IT系统的循环精确仿真（CAS）的并行化和性能改进。主要研究成果有以下几个仿真技术： 1．我们的并行 CAS 与有序执行模拟器相结合，生成并行模拟的近似部分结果。为了避免这种顺序模拟器成为瓶颈，我们设计了一种加速技术来自动生成特定于每个工作负载的模拟器。该技术使指令级仿真的性能提高了34倍。2．我们设计了一种新的并行模拟方法，其中模拟过程沿时间轴划分为多个间隔，以便并行执行间隔。间隔之间的依赖关系产生的问题通过推测性地执行每个间隔来解决，其近似部分结果为使用有序模拟提前间隔。结果，我们使用八节点 PC 集群的并行执行实现了高达 5.8 倍的加速。3。为了估计实时系统设计中所需的由中断引起的最坏情况延迟，我们设计了 O (FN) 算法来分析具有 N 条指令的工作负载的高速缓存和分支预测器的最坏情况未命中增量，并且F打断。此外，我们设计了一种 O (Nlog N) 算法来使用 CAS 精确计算延迟本身，该算法可以通过并行化加速，在八节点 PC 集群中最多可加速 9 倍。