Combining Topology Synthesis and Physical Design for Wavelength-Routed Optical Networks-on-Chip (WRONoC) — Design Automation Using Physical Layout Templates

将拓扑综合和物理设计相结合，实现波长路由片上光网络 (WRONoC) – 使用物理布局模板的设计自动化

• 批准号: 439798838
• 负责人: Professor Dr.-Ing. Ulf Schlichtmann
• 金额: --
• 依托单位: Lehrstuhl für Entwurfsautomatisierung (EDA)
• 依托单位国家: 德国
• 项目类别: Research Grants
• 财政年份: 2020
• 资助国家: 德国
• 起止时间: 2019-12-31 至 2023-12-31
• 项目状态: 已结题
• 来源: https://gepris.dfg.de/gepris/projekt/439798838?language=en
• 关键词: Combining; Topology; Synthesis; Physical; Design

Optical networks-on-chip (ONoC) is an appealing next-generation architecture for on-chip communication in multiprocessor systems-on-chip. Compared to the traditional NoC platforms that use electrical interconnects, ONoCs use optical waveguides to accommodate and transmit optical signals of different wavelengths, and show advantages in high bandwidth, low latency, and distance-independent power consumption. This proposal focuses on a specific family of ONoCs, namely wavelength-routed ONoCs (WRONoCs), which are renowned for supporting all-to-all simultaneous and collision-free data transmission. The state-of-the-art WRONoC design flow is separated into two sequential steps: logic synthesis and physical design, in between of which there is an optimization gap. In the present project, we propose to develop an design automation approach to synthesize and optimize concurrently both the logic topology and the physical layout of a WRONoC design. To reduce the design space to a manageable complexity, we propose to use physical layout templates as additional inputs, which will confine the placement and routing options to a collection of predefined placeholders. To achieve this goal, we will first research the design space of the physical layout templates, and then develop a design automation approach to customize a physical layout template for any given communication graph and layout constraints in an automated manner; integrate the customized template to the optical plane; and synthesize and optimize a complete WRONoC design based on the integrated template. We have tested some manually designed physical layout templates with a prototyped optimization tool and achieved promising results. Thus we are confident that the present project will enable more cost- and energy-efficient WRONoC designs and contribute to the scaling up of this emerging technology.

片上光网络 (ONoC) 是一种颇具吸引力的下一代多处理器片上系统片上通信架构。与使用电互连的传统NoC平台相比，ONoC使用光波导来容纳和传输不同波长的光信号，并在高带宽、低延迟和与距离无关的功耗方面表现出优势。该提案重点关注特定的 ONoC 系列，即波长路由 ONoC (WRONoC)，该系列以支持全对全同步和无冲突数据传输而闻名。最先进的 WRONoC 设计流程分为两个连续步骤：逻辑综合和物理设计，两者之间存在优化间隙。在当前项目中，我们建议开发一种设计自动化方法来同时综合和优化 WRONoC 设计的逻辑拓扑和物理布局。为了将设计空间减少到可管理的复杂性，我们建议使用物理布局模板作为附加输入，这会将布局和布线选项限制为预定义占位符的集合。为了实现这一目标，我们将首先研究物理布局模板的设计空间，然后开发一种设计自动化方法，以自动化的方式为任何给定的通信图和布局约束定制物理布局模板；将定制模板集成到光学平面上；并基于集成模板综合和优化完整的WRONoC设计。我们使用原型优化工具测试了一些手动设计的物理布局模板，并取得了可喜的结果。因此，我们相信当前的项目将实现更具成本效益和能效的 WRONoC 设计，并有助于扩大这一新兴技术的规模。