Combining Topology Synthesis and Physical Design for Wavelength-Routed Optical Networks-on-Chip (WRONoC) — Design Automation Using Physical Layout Templates

将拓扑综合和物理设计相结合,实现波长路由片上光网络 (WRONoC) – 使用物理布局模板的设计自动化

基本信息

项目摘要

Optical networks-on-chip (ONoC) is an appealing next-generation architecture for on-chip communication in multiprocessor systems-on-chip. Compared to the traditional NoC platforms that use electrical interconnects, ONoCs use optical waveguides to accommodate and transmit optical signals of different wavelengths, and show advantages in high bandwidth, low latency, and distance-independent power consumption. This proposal focuses on a specific family of ONoCs, namely wavelength-routed ONoCs (WRONoCs), which are renowned for supporting all-to-all simultaneous and collision-free data transmission. The state-of-the-art WRONoC design flow is separated into two sequential steps: logic synthesis and physical design, in between of which there is an optimization gap. In the present project, we propose to develop an design automation approach to synthesize and optimize concurrently both the logic topology and the physical layout of a WRONoC design. To reduce the design space to a manageable complexity, we propose to use physical layout templates as additional inputs, which will confine the placement and routing options to a collection of predefined placeholders. To achieve this goal, we will first research the design space of the physical layout templates, and then develop a design automation approach to customize a physical layout template for any given communication graph and layout constraints in an automated manner; integrate the customized template to the optical plane; and synthesize and optimize a complete WRONoC design based on the integrated template. We have tested some manually designed physical layout templates with a prototyped optimization tool and achieved promising results. Thus we are confident that the present project will enable more cost- and energy-efficient WRONoC designs and contribute to the scaling up of this emerging technology.
片上的光网络(Onoc)是一种吸引人的下一代体系结构,用于在片上的多处理器系统中进行片上通信。与使用电气互连的传统NOC平台相比,Onoc使用光学波导来适应和传输不同波长的光学信号,并显示出高带宽,低延迟和无距离无距离功耗的优势。该提案的重点是特定的Onoc家族,即延伸波长的Onocs(WRONOCS),该家族以支持全能的同时且无碰撞数据传输而闻名。最新的WRONOC设计流分为两个顺序的步骤:逻辑合成和物理设计,其中有一个优化的差距。在本项目中,我们建议开发一种设计自动化方法,以合成和优化WRONOC设计的逻辑拓扑和物理布局。为了将设计空间降低到可管理的复杂性,我们建议将物理布局模板用作附加输入,这将将放置和路由选项限制在预定的占位符的集合中。为了实现这一目标,我们将首先研究物理布局模板的设计空间,然后开发一种设计自动化方法,以自动化的方式为任何给定的通信图和布局约束定制物理布局模板;将定制模板集成到光平面;并根据集成模板合成并优化完整的WRONOC设计。我们已经使用原型优化工具测试了一些手动设计的物理布局模板,并实现了令人鼓舞的结果。因此,我们相信本项目将启用更具成本和节能的WRONOC设计,并有助于扩大这一新兴技术。

项目成果

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Professor Dr.-Ing. Ulf Schlichtmann其他文献

Professor Dr.-Ing. Ulf Schlichtmann的其他文献

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{{ truncateString('Professor Dr.-Ing. Ulf Schlichtmann', 18)}}的其他基金

Application of a Generative Grammar for the Automated Architectural Exploration of Digital System-on-Chip (SoC) Platforms
生成语法在数字片上系统 (SoC) 平台自动架构探索中的应用
  • 批准号:
    231839943
  • 财政年份:
    2013
  • 资助金额:
    --
  • 项目类别:
    Research Grants
Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach
提升设备级特性以实现容错系统级设计:跨层方法
  • 批准号:
    182085881
  • 财政年份:
    2010
  • 资助金额:
    --
  • 项目类别:
    Priority Programmes

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