SHF: Small: A General-purpose Parallel and Heterogeneous Task Graph Computing System for VLSI CAD

SHF：小型：用于 VLSI CAD 的通用并行异构任务图计算系统

• 批准号: 2349141
• 负责人: Tsung-Wei Huang
• 金额: $ 40.31万
• 依托单位: University of Wisconsin-Madison
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2024-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2349141&HistoricalAwards=false
• 关键词: SHF; Small; General; purpose; Parallel

The ever-increasing design complexity in very-large-scale integration (VLSI) implementation will soon far exceed what many existing computer-aided design (CAD) tools can scale with reasonable design time and effort. A key fundamental challenge is that CAD must incorporate new parallel paradigms comprising many-core central processing units (CPUs) and graphics processing units (GPUs) to achieve transformational performance and productivity milestones. However, this goal is impossible to achieve without a novel computing system to tackle the implementation complexities of parallelizing CAD, such as irregular task parallelism, large CPU-GPU dependent tasks, dynamic control flow, and distributed computing, which cannot be expressed and executed efficiently with mainstream parallel computing systems. The project investigates a new computing system to advance the current state-of-the-art by assisting everyone to efficiently tackle the challenges of designing, implementing, and deploying parallel CAD algorithms on heterogeneous nodes. The proposed open-source software and education activities will facilitate technology transfers and enable diverse industry-academia collaborations in a multidisciplinary community.This project aims to streamline the building of parallel CAD tools on heterogeneous nodes by researching a novel computing system that consists of three major components: (1) a new parallel and heterogeneous task graph programming model that enables CAD developers to express end-to-end parallelism using minimal programming effort, (2) an efficient system runtime to support the programming model with high performance optimized across latency, energy efficiency, and throughput, and (3) new heterogeneous algorithms and frameworks to speed up time-consuming physical synthesis tasks and timing closure flow. Furthermore, the project is establishing new formulations and theory results for heterogeneous graph partitioning and task scheduling that are generalizable and scalable to arbitrary heterogeneous domains. Outcomes of the project are being made open-source to encourage a wide range of CAD researchers and developers to participate in and contribute to the project for sharing new findings, ideas, educational resources, and technology.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

超大规模集成 (VLSI) 实施中不断增加的设计复杂性很快将远远超过许多现有计算机辅助设计 (CAD) 工具通过合理的设计时间和精力所能扩展的范围。一个关键的基本挑战是 CAD 必须采用新的并行范例，包括多核中央处理单元 (CPU) 和图形处理单元 (GPU)，以实现转型性能和生产力里程碑。然而，如果没有一种新颖的计算系统来解决并行化 CAD 的实现复杂性，例如不规则任务并行性、大型 CPU-GPU 依赖任务、动态控制流和分布式计算等无法有效表达和执行的问题，这一目标就不可能实现。与主流并行计算系统。该项目研究了一种新的计算系统，通过帮助每个人有效地应对在异构节点上设计、实现和部署并行 CAD 算法的挑战，来推进当前最先进的技术。拟议的开源软件和教育活动将促进技术转让，并在多学科社区中实现多样化的产学合作。该项目旨在通过研究一种由三个主要组成部分组成的新型计算系统，简化异构节点上并行 CAD 工具的构建组件：(1) 一种新的并行和异构任务图编程模型，使 CAD 开发人员能够使用最少的编程工作来表达端到端并行性，(2) 高效的系统运行时，支持跨延迟优化的高性能编程模型，能源效率和吞吐量，以及(3)新的异构算法和框架，加速耗时的物理综合任务和时序收敛流程。此外，该项目正在为异构图分区和任务调度建立新的公式和理论结果，这些公式和理论结果可推广到任意异构域。该项目的成果正在开源，以鼓励广泛的 CAD 研究人员和开发人员参与该项目并为该项目做出贡献，以分享新的发现、想法、教育资源和技术。该奖项反映了 NSF 的法定使命，并已通过使用基金会的智力优点和更广泛的影响审查标准进行评估，认为值得支持。