Collaborative Research: FET: Medium:Compact and Energy-Efficient Compute-in-Memory Accelerator for Deep Learning Leveraging Ferroelectric Vertical NAND Memory

合作研究：FET：中型：紧凑且节能的内存计算加速器，用于利用铁电垂直 NAND 内存进行深度学习

• 批准号: 2312886
• 负责人: VIJAYKRISHNAN NARAYANAN
• 金额: $ 26.6万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2027-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2312886&HistoricalAwards=false
• 关键词: Collaborative; Research; FET; Medium; Compact

The field of artificial intelligence (AI) has recently made significant strides, with notable advancements such as large language models like ChatGPT taking the world by storm. However, these breakthroughs would not have been possible without the availability of powerful computing hardware, such as graphics processing units (GPUs). Such hardware has benefited from several decades of technology scaling following Moore's law. As technology approaches its physical limits and AI models require exponentially increasing hardware resources, including computation and storage, alternative computing paradigms with superior energy efficiency and performance are necessary for a sustainable future. Compute-in-memory is one promising approach where computations are directly performed in memory units, eliminating most data movements, a key bottleneck in conventional computers. However, to best exploit the compute-in-memory for acceleration of AI models on the scale of giga-byte to tera-byte levels, it is critical to have high capacity, energy-efficient, and high performance memory technology to fit the models. NAND memory is a form of erasable programmable read-only memory that takes its name from the not-and (NAND) logic gate. The proposed research aims to develop ferroelectric vertical NAND memory to meet these demands and at the same time train students for developing a future workforce for the semiconductor industry.Vertical NAND memory offers the highest density by increasing the number of stacked layers vertically. However, conventional vertical NAND memory based on floating gate or charge trap flash suffers from poor performance, including high write voltage, low speed, and poor endurance, despite their large capacity. To address these issues, this research proposes the development of a vertical NAND flash alternative: the vertical NAND ferroelectric field-effect transistor (FeFET), which achieves high density and high performance simultaneously. By leveraging the recently discovered ferroelectric HfO2, superior performance can be achieved as ferroelectric programming is driven by an applied electric field, which can be energy-efficient and fast. The project aims to design and evaluate vertical NAND FeFET-based compute-in-memory accelerators from devices to architectures, with innovations such as novel cell designs to achieve multi-level cell and variation suppression, vertical NAND array disturb mitigation with a novel array structure, and mapping and benchmarking of various important information processing tasks to the vertical NAND FeFET array. Additionally, this research includes workforce training activities such as lectures and hands-on experience offered to K-12 students and teachers to promote excitement and attract them to the talent pipeline for the semiconductor industry. The proposed research will recruit graduate and undergraduate students via the Research Experience for Undergraduates (REU) program from underrepresented groups, and the knowledge acquired in this project will be distributed through curriculum development and online sharing repositories.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

人工智能 (AI) 领域最近取得了重大进展，诸如 ChatGPT 等大型语言模型风靡全球等显着进步。然而，如果没有强大的计算硬件（例如图形处理单元（GPU）），这些突破就不可能实现。此类硬件受益于几十年来遵循摩尔定律的技术扩展。随着技术接近其物理极限，人工智能模型需要呈指数级增长的硬件资源，包括计算和存储，具有卓越能源效率和性能的替代计算范式对于可持续的未来是必要的。内存计算是一种很有前途的方法，计算直接在内存单元中执行，消除了大多数数据移动，这是传统计算机的一个关键瓶颈。然而，为了最好地利用内存计算来加速千兆字节到太字节级别的人工智能模型，拥有大容量、高能效和高性能的内存技术来适应模型至关重要。 NAND 存储器是一种可擦除可编程只读存储器，其名称源自非与 (NAND) 逻辑门。拟议的研究旨在开发铁电垂直 NAND 存储器来满足这些需求，同时培训学生为半导体行业培养未来的劳动力。垂直 NAND 存储器通过增加垂直堆叠层数来提供最高密度。然而，基于浮栅或电荷捕获闪存的传统垂直NAND存储器尽管容量大，但性能较差，包括写入电压高、速度低、耐用性差。为了解决这些问题，本研究提出开发垂直 NAND 闪存替代方案：垂直 NAND 铁电场效应晶体管 (FeFET)，它可以同时实现高密度和高性能。通过利用最近发现的铁电 HfO2，由于铁电编程由外加电场驱动，因此可以实现卓越的性能，既节能又快速。该项目旨在设计和评估从设备到架构的基于垂直 NAND FeFET 的内存计算加速器，并采用新颖的单元设计来实现多级单元和变化抑制、通过新颖的阵列结构减轻垂直 NAND 阵列干扰等创新，以及将各种重要信息处理任务映射到垂直 NAND FeFET 阵列并进行基准测试。此外，这项研究还包括为 K-12 学生和教师提供讲座和实践经验等劳动力培训活动，以激发他们的兴趣并吸引他们加入半导体行业的人才队伍。拟议的研究将通过本科生研究经验（REU）计划从代表性不足的群体中招募研究生和本科生，该项目中获得的知识将通过课程开发和在线共享存储库进行分发。该奖项反映了 NSF 的法定使命，并已被通过使用基金会的智力优点和更广泛的影响审查标准进行评估，认为值得支持。