CAREER: Building Scalable and Reliable Composable Computer Architectures

职业：构建可扩展且可靠的可组合计算机架构

• 批准号: 2341039
• 负责人: Hyeran Jeon
• 金额: $ 49.8万
• 依托单位: University of California - Merced
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2024
• 资助国家: 美国
• 起止时间: 2024-07-01 至 2029-06-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2341039&HistoricalAwards=false
• 关键词: CAREER; Building; Scalable; Reliable; Composable

In the post-Moore era, computing platforms have become more diverse and heterogeneous. With the evolution of packaging and interconnect technology, multiple computing and memory components are integrated into a single processor package. The high-bandwidth and coherent interconnects enable multiple accelerators and memory components on a platform together achieve server scale computing power. Though this new paradigm of computing platforms enables more optimal processor designs for domain-specific computing, the scalability is unclear. The fast interconnects between intra- and inter-chip components do not necessarily lead to linear speedup unless the communications are carefully handled. This project aims to keep up with performance projection of Moore’s law in post-Moore era with scalable architecture-level solutions. As graphics processing units (GPUs) are increasingly important for accelerating big data workloads, this project will focus on architecting highly scalable and reliable GPU platforms that can achieve almost linear speedup with the scaling of GPU chiplet modules and memory devices. The presented research tools and virtual memory systems will advance the state-of-the-art architectures with coherent and scalable communications among the intra- and inter-GPU chiplet components. The presented architecture design will be able to accelerate emerging big-data workloads without needing to access expensive cloud or data center supercomputers. The research findings will be incorporated into new and existing undergraduate and graduate courses as well as K-12 outreach programs.This project aims to address the following research questions: 1) How to manage all the integrated computing and memory components to communicate efficiently? Can the conventional virtual memory system handle large volumes of address translations? 2) How to achieve scalable and sustainable performance over multi-level non-uniform memory access (NUMA) architectures? Can consistent data access latency be enforced? This project answers these questions through two technical thrusts. The first thrust will design research tools that enable design explorations of scalable and heterogeneous platforms. Then, efficient virtual memory systems and page mapping algorithms will be architected. Unlike existing solutions, the methods presented in this project will exploit the unique GPU execution model while enabling coherent communication among intra- and inter-GPU packages. The second thrust will explore methods to enforce sustainable performance on the target multi-GPU systems having disaggregated memories. These new platforms have emerging challenges of deeper NUMA levels than conventional systems because individual computing and memory components can be integrated through multiple levels of extensible switches. This thrust will design efficient memory management and prefetch algorithms, which together enforce data to be ready within 1-2 NUMA distances.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

在后摩尔时代，随着封装和互连技术的发展，计算平台变得更加多样化和异构，多个计算和内存组件被集成到单个处理器封装中，高带宽和一致的互连使得多个加速器和内存成为可能。尽管这种新的计算平台范式能够为特定领域的计算提供更优化的处理器设计，但芯片内和芯片间组件之间的快速互连并不一定会带来可扩展性。线性加速比除非仔细处理通信，否则该项目旨在通过可扩展的架构级解决方案跟上摩尔定律的性能预测，因为图形处理单元 (GPU) 对于加速大数据工作负载越来越重要。专注于构建高度可扩展且可靠的 GPU 平台，这些平台可以通过 GPU 小芯片模块和内存设备的扩展实现几乎线性的加速，所提出的研究工具和虚拟内存系统将通过一致和可扩展的通信推进最先进的架构。所提出的架构设计将能够加速新兴的大数据工作负载，而无需访问昂贵的云或数据中心超级计算机。研究结果将被纳入新的和现有的本科生和研究生课程中。以及 K-12 外展计划。该项目旨在解决以下研究问题： 1）如何管理所有集成计算和内存组件以进行有效通信？ 2）传统虚拟内存系统能否处理大量地址转换？如何实现可扩展性和多级非均匀内存访问 (NUMA) 架构的可持续性能？能否实现一致的数据访问延迟？该项目的第一个重点是设计支持可扩展和异构平台设计探索的研究工具。然后，将构建高效的虚拟内存系统和页面映射算法，与现有的解决方案不同，该项目中提出的方法将利用独特的 GPU 执行模型，同时实现 GPU 内和 GPU 间的通信。加强可持续绩效的方法具有分解内存的目标多 GPU 系统面临着比传统系统更深的 NUMA 级别的挑战，因为单个计算和内存组件可以通过多级可扩展交换机进行集成，这一推动力将设计高效的内存管理和预取算法。它们共同强制数据在 1-2 NUMA 距离内准备就绪。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力优点和更广泛的影响审查标准进行评估，被认为值得支持。