FuSe-TG: The Future of Semiconductor Technologies for Computing through Device-Architecture-Application Co-Design

FuSe-TG：通过设备-架构-应用协同设计进行计算的半导体技术的未来

• 批准号: 2235329
• 负责人: Subhasish Mitra
• 金额: $ 29.96万
• 依托单位: Stanford University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-05-01 至 2025-04-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2235329&HistoricalAwards=false
• 关键词: FuSe; TG; Future; Semiconductor; Technologies

A 2020 issue of Massachusetts Institute of Technology’s Tech Review read “[Moore’s law] has fueled prosperity of the last 50 years. But the end is now in sight.” However, this latter conclusion can be debated. Historically, exponential growth in semiconductors was achieved through two-dimensional (2D) miniaturization of devices (transistors, memory, and wires) to pack more components in the same chip area and achieve lower cost per function. Indeed, we are now reaching the physical limits of this 2D scaling paradigm. However, alternative approaches will trigger a seismic shift to reinvigorate the US semiconductor economy. This project will explore, identify, and map out the possible paths that lie ahead through partnerships among universities and industry/industrial research leaders in semiconductors, through educational efforts to translate new knowledge into the educational pipeline and semiconductor workforce, and through piloting new collaboration methods to enable lab-to-fab translation more readily with robust inputs from industry experts. This teaming grant will thus break new grounds for the future of semiconductors for domain-specific computing. The longer-term goal is to create national impact on research, education, and commercialization by encouraging students to follow a career path in semiconductors near national fab facilities. This is planned through multiple catalysts, e.g., a pilot program for lab and fab experiences for community college students, co-design challenges etc.In the past two decades, it has become increasingly untenable to create architectures and device technologies independent of one another because there are intertwined dependencies across the abstraction boundaries. In addition, because of the extreme energy efficiency demands of future systems, architectures and device technologies must be driven by the specific application domains at hand. Thus, the focus of this project is device-architecture-application co-design. Building in the third dimension (3D, like a high-rise), with ultra-dense vertical connectivity between 3D layers, could significantly increase the number of devices packed on a piece of chip real estate in a scalable manner for significant benefits in energy and throughput, as, e.g., used by the Stanford Nano-Engineered Computing Systems Technology (N3XT) 3D approach. Multiple N3XT 3D chips are to be integrated through a continuum of chip stacking-/interposer-/wafer-level assembly/ integration. The foundation for this teaming activities will be the MOnolithic Stacked, Assembled IC (MOSAIC) N3XT 3D concept. Rather than relying solely on silicon-based transistors to perform all desired functions, heterogeneous materials and customized device structures optimally designed to perform diverse/distinct functions, i.e., domain-specific device technologies, will be used. The project will explore new domain-specific architectures (e.g., targeting AI deep neural nets, augmented reality/virtual reality, and graph analytics) uniquely enabled by the technology concepts, new Electronic Design Automation tools, and new open-source frameworks for device-architecture-application co-design.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

麻省理工学院 2020 年的《技术评论》写道：“[摩尔定律]推动了过去 50 年的繁荣，但现在已经看到了终结。”然而，从历史上看，后一个结论是有争议的。通过器件（晶体管、存储器和电线）的二维 (2D) 小型化来实现，以在同一芯片面积中封装更多组件，并降低每项功能的成本。事实上，我们现在已经达到了这一点的物理极限。 2D 缩放范式。然而，替代方法将引发一场巨大的转变，以重振美国半导体经济。该项目将通过大学和半导体行业/工业研究领导者之间的合作来探索、确定和规划未来的可能路径。教育将新知识转化为教育工作渠道和半导体劳动力，并通过试点新的协作方法，在行业专家的大力投入下更容易地实现实验室到晶圆厂的转化，因此，这项团队资助将为半导体的未来开辟新天地。为了长期目标是通过鼓励学生在国家晶圆厂附近走上半导体职业道路，对研究、教育和商业化产生国家影响。这是通过多种催化剂进行规划的，例如试点计划。社区学院学生的实验室和工厂经验、协同设计挑战等。在过去的二十年中，创建彼此独立的架构和设备技术变得越来越站不住脚，因为跨抽象边界存在相互交织的依赖关系。的未来系统、架构和设备技术的极端能源效率需求必须由当前的特定应用领域驱动，因此，该项目的重点是三维（3D，如三维）的设备-架构-应用协同设计。高层建筑），在 3D 层之间具有超密集的垂直连接，可以以可扩展的方式显着增加一块芯片空间上封装的设备数量，从而在能源和吞吐量方面取得显着优势，例如斯坦福大学所使用的纳米工程计算系统技术 (N3XT) 3D 方法将通过连续的芯片堆叠/中介层/晶圆级组装/集成来集成多个 N3XT 3D 芯片。组装 IC (MOSAIC) N3XT 3D 概念不是仅仅依靠硅基晶体管来最佳地执行所有所需功能、异质材料和定制器件结构。该项目将使用旨在执行不同/不同功能的特定领域的设备技术（例如，针对人工智能深度神经网络、增强现实/虚拟现实和图形分析）。通过技术概念、新的电子设计自动化工具以及用于设备-架构-应用协同设计的新的开源框架。该奖项是 NSF 的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准。