SPX: Collaborative Research: Scalable Heterogeneous Migrating Threads for Post-Moore Computing

SPX：协作研究：后摩尔计算的可扩展异构迁移线程

• 批准号: 1822919
• 负责人: Vivek Sarkar
• 金额: $ 45万
• 依托单位: Georgia Tech Research Corporation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2018
• 资助国家: 美国
• 起止时间: 2018-10-01 至 2023-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1822919&HistoricalAwards=false
• 关键词: SPX; Collaborative; Research; Scalable; Heterogeneous

The project will advance the state of the art in computer architecture and programming systems for extreme and heterogeneous parallelism. It is clear that the post-Moore' law era will require major disruptions in computing systems. This project will address computer architecture and programming system challenges for this new era, with a focus on approaches that are expected to be scalable in size, cost effectiveness, and usability by retaining some tenets of the von Neumann computing model (unlike more exploratory approaches like biological or quantum computing). By emphasizing data analytics, the work will also benefit a rapidly growing swatch of modern life (commercial, cyber, national security, social networks). A deeper understanding of how such applications can be made more scalable, and responsive enough to handle increasing real-time requirements, should lead to wider impacts across every-day life with significant potential for technology transition. There is also a direct connection to pedagogy and workforce development, since both hardware and software aspects of this proposal can enable a broad range of students to better understand the wider diversity of computing platforms projected in future technology roadmaps. The SHMT (Scalable Heterogeneous Migrating Thread) model developed in this award will include extensions to the migrating threads and asynchronous task models to support heterogeneity, and extensions to the transaction and actor models to support data coherence. Further, the investigators propose to use data analytic graph problems to evaluate their research, since these applications are both important in practice and are challenging to solve on current systems. Given the expected continued increase in the size, complexity, and dynamic nature of such computations, it is of growing value to understand how to implement them in a manner that can scale to very high levels of concurrency in environments that include high rate streams of both updates and queries. These techniques can also apply to other application classes, such as scientific applications where data is sparse or irregular. The overall objective of this 3-year research project is to advance the foundations of computer architecture and programming systems to address the emerging challenges of scalable parallelism and extreme heterogeneity, with an emphasis on data analytics and solving data coherence, system management, resource allocation, and task scheduling issues. The investigators will leverage their distinct but synergistic expertise in the architecture and programming systems areas by building on, and integrating, their past work on migrating threads and near-memory processing, software support for asynchronous task parallelism for heterogeneous computing, and data analytics. The Center for Research into Novel Computing Hierarchies (CRNCH) at Georgia Tech will provide access to first-of-a-kind alternative systems for use in evaluating the new concepts. Industrial collaborators include Lexis-Nexis Risk Solutions and Kyndi, for whom graph data analytics are central to their business model.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该项目将推进计算机架构和编程系统的最新技术，以实现极端和异构并行性。显然，后摩尔定律时代将需要对计算系统进行重大破坏。该项目将解决这个新时代的计算机架构和编程系统挑战，重点关注通过保留冯·诺依曼计算模型的一些原则而有望在规模、成本效益和可用性方面可扩展的方法（不同于更具探索性的方法，例如生物或量子计算）。通过强调数据分析，这项工作还将惠及快速增长的现代生活领域（商业、网络、国家安全、社交网络）。更深入地了解如何使此类应用程序更具可扩展性和足够的响应能力来处理日益增长的实时要求，应该会对日常生活产生更广泛的影响，并具有技术转型的巨大潜力。它还与教学法和劳动力发展有直接联系，因为该提案的硬件和软件方面都可以使广大学生更好地了解未来技术路线图中规划的更广泛的计算平台多样性。该奖项中开发的SHMT（可扩展异构迁移线程）模型将包括对迁移线程和异步任务模型的扩展以支持异构性，以及对事务和参与者模型的扩展以支持数据一致性。此外，研究人员建议使用数据分析图问题来评估他们的研究，因为这些应用在实践中既重要又在当前系统上解决起来具有挑战性。考虑到此类计算的规模、复杂性和动态性质预计将持续增加，了解如何以一种可以在包括高速流的环境中扩展到非常高的并发水平的方式来实现它们具有越来越大的价值。更新和查询。这些技术还可以应用于其他应用程序类别，例如数据稀疏或不规则的科学应用程序。这个为期 3 年的研究项目的总体目标是推进计算机体系结构和编程系统的基础，以应对可扩展并行性和极端异构性的新挑战，重点是数据分析和解决数据一致性、系统管理、资源分配、以及任务调度问题。研究人员将通过构建和集成他们过去在迁移线程和近内存处理、异构计算异步任务并行软件支持以及数据分析方面的工作，利用他们在架构和编程系统领域独特但协同的专业知识。佐治亚理工学院新型计算层次研究中心 (CRNCH) 将提供首个替代系统，用于评估新概念。工业合作者包括 Lexis-Nexis Risk Solutions 和 Kyndi，对他们来说，图数据分析是其业务模式的核心。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力优点和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

MAESTRO: A Data-Centric Approach to Understand Reuse, Performance, and Hardware Cost of DNN Mappings

MAESTRO：一种以数据为中心的方法，用于了解 DNN 映射的重用、性能和硬件成本

• DOI: 10.1109/mm.2020.2985963
• 发表时间: 2020-05
• 期刊: IEEE Micro
• 影响因子: 3.6
• 作者: Kwon, Hyoukjun;Chatarasi, Prasanth;Sarkar, Vivek;Krishna, Tushar;Pellauer, Michael;Parashar, Angshuman
• 通讯作者: Parashar, Angshuman

Vyasa: A High-Performance Vectorizing Compiler for Tensor Convolutions on the Xilinx AI Engine

Vyasa：Xilinx AI 引擎上用于张量卷积的高性能矢量化编译器

• DOI: 10.1109/hpec43674.2020.9286183
• 发表时间: 2020-06-02
• 期刊: 2020 IEEE High Performance Extreme Computing Conference (HPEC)
• 作者: Prasanth Chatarasi;S. Neuendorffer;Samuel Bayliss;K. Vissers;Vivek Sarkar
• 通讯作者: Vivek Sarkar

ReACT: Redundancy-Aware Code Generation for Tensor Expressions

ReACT：张量表达式的冗余感知代码生成

• DOI: 10.1145/3559009.3569685
• 发表时间: 2022-10-08
• 期刊: Proceedings of the International Conference on Parallel Architectures and Compilation Techniques
• 作者: Tong Zhou;Ruiqin Tian;Rizwan A. Ashraf;R. Gioiosa;Gokcen Kestor;Vivek Sarkar
• 通讯作者: Vivek Sarkar

GPU Subwarp Interleaving

GPU 子扭曲交错

• DOI: 10.1109/hpca53966.2022.00090
• 发表时间: 2022-04
• 期刊: IEEE
• 作者: Damani, Sana;Stephenson, Mark;Rangan, Ram;Johnson, Daniel;Kulkami, Rishkul;Keckler, Stephen W.
• 通讯作者: Keckler, Stephen W.

A Preliminary Study of Compiler Transformations for Graph Applications on the Emu System

Emu系统上图应用编译器转换的初步研究

• 发表时间: 2018-01
• 期刊: MCHPC'18: Proceedings of the Workshop on Memory Centric High Performance Computing
• 作者: Chatarasi, Prasanth;Sarkar, Vivek
• 通讯作者: Sarkar, Vivek