Collaborative Research: Defect Immune, Topologically Protected Devices for Ultra-Low Power Electronics

合作研究：用于超低功率电子器件的缺陷免疫、拓扑保护器件

• 批准号: 1802167
• 负责人: Sanjay Banerjee
• 金额: $ 12万
• 依托单位: University of Texas at Austin
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2018
• 资助国家: 美国
• 起止时间: 2018-08-01 至 2021-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1802167&HistoricalAwards=false
• 关键词: Collaborative; Research; Defect; Immune; Topologically

Imperfections in materials, such as defects or edge roughness, often severely limit electronic device performance. This is especially problematic at the nanoscale where even a single atomic defect can drastically disrupt transport. Devices that are tolerant to these imperfections are thus the key to future technologies. The investigation of the fundamental properties and integration of two new defect-tolerant device concepts is proposed, enabled by novel 2D and 3D topological insulators (TIs), that exhibit unprecedented low-power, room temperature performance and functionalities only achievable using these unique materials. This tolerance to defects will enable nanoelectronics beyond the currently known limits and will specifically impact the national grand challenge of enabling ultra-low-power, post-silicon electronics and represent significant progress in an area of national technological strength, semiconductor electronics. A team of researchers with complementary expertise, including junior investigators complemented by accomplished senior professors, will address the challenges of the proposed work. This research will also broaden scientific and educational participation by creating a pipeline of pre-college and undergraduate students motivated to study science and engineering at universities through, for example, NSF-sponsored Research Experiences for Undergraduates (REU) programs and collaborations with national laboratories and industry partners. The researchers will also engage the public through science cafe programs where faculty members present their research in local pubs and restaurants.This collaborative research team will elucidate the fundamental science and technological implications of new topological insulator (TI)-based nanoelectronic device concepts that can operate at low-power, well above room temperature. Two complementary research threads will be pursued, both of which will enable a new, ultra-low-power, topologically protected device made of bismuth-based materials: 1) a 2D TI-based field-effect transistor that is immune to materials and device imperfections such as defects and line-edge roughness, and 2) a 3D TI-based tunneling device utilizing spin-filtering to exhibit negative differential resistance with unprecedented peak-to-valley ratio performance. TI growth by molecular beam epitaxy (Hinkle) will focus on 2D Bi and 3D Bi2Se3, which have predicted room-temperature device applications. Surface and edge state detection and chemical/structural properties will be investigated using in-situ techniques (Wallace). Theoretical studies including density functional theory (DFT), scattering, and mobility calculations (Vandenberghe) will be employed. Advanced 2- and 3-terminal devices will be fabricated (Banerjee) and these device characteristics will be evaluated in NAND gates. This research will provide materials and device concepts for advanced low-power, high-performance logic, memory, and even oscillatory neuromorphic applications using TIs, a class of devices which are extremely robust against defects/impurities. A TI and 2D materials property and benchmarking database through collaboration with NIST will also be established.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

材料的缺陷，例如缺陷或边缘粗糙度，通常会严重限制电子设备的性能。这在纳米尺度上尤其成问题，即使是单个原子缺陷也会严重破坏运输。 因此，能够容忍这些缺陷的设备是未来技术的关键。提出了对两种新的容错器件概念的基本特性和集成的研究，通过新颖的 2D 和 3D 拓扑绝缘体 (TI) 实现，它们表现出前所未有的低功耗、室温性能和功能，只有使用这些独特的材料才能实现。这种对缺陷的容忍度将使纳米电子学超越目前已知的极限，并将特别影响实现超低功耗、后硅电子学的国家重大挑战，并代表国家技术实力领域半导体电子学的重大进步。 一个由具有互补专业知识的研究人员组成的团队，包括初级研究人员和资深教授的补充，将解决拟议工作的挑战。 这项研究还将通过创建一条有动力在大学学习科学和工程的预科生和本科生渠道，扩大科学和教育参与，例如，通过 NSF 资助的本科生研究经验 (REU) 项目以及与国家实验室和行业合作伙伴。 研究人员还将通过科学咖啡馆项目吸引公众，教职人员在当地的酒吧和餐馆展示他们的研究成果。这个合作研究团队将阐明可操作的基于新型拓扑绝缘体（TI）的纳米电子器件概念的基本科学和技术含义在低功率下，远高于室温。 将进行两条互补的研究线索，这两条线索都将实现由铋基材料制成的新型超低功耗、拓扑保护器件：1）基于 TI 的 2D 场效应晶体管，不受材料和器件的影响缺陷和线边缘粗糙度等缺陷；2) 基于 3D TI 的隧道器件，利用自旋过滤展现负微分电阻和前所未有的峰谷比性能。 通过分子束外延 (Hinkle) 进行的 TI 生长将重点关注 2D Bi 和 3D Bi2Se3，它们已预测了室温器件的应用。 将使用原位技术（Wallace）研究表面和边缘状态检测以及化学/结构特性。 将采用包括密度泛函理论 (DFT)、散射和迁移率计算 (Vandenberghe) 在内的理论研究。 将制造先进的 2 端和 3 端器件 (Banerjee)，并将在 NAND 门中评估这些器件特性。这项研究将为先进的低功耗、高性能逻辑、存储器甚至使用 TI 的振荡神经形态应用提供材料和设备概念，TI 是一类对缺陷/杂质具有极强鲁棒性的设备。 还将通过与 NIST 合作建立 TI 和 2D 材料属性和基准数据库。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力价值和更广泛的影响审查标准进行评估，被认为值得支持。