IRES: International Research Experience for Students on Design Automation of Three-Dimensional Integrated Circuits

IRES：三维集成电路设计自动化学生国际研究经验

• 批准号: 1456867
• 负责人: Yiyu Shi
• 金额: $ 24.97万
• 依托单位: Missouri University of Science and Technology
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2015
• 资助国家: 美国
• 起止时间: 2015-11-01 至 2015-10-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1456867&HistoricalAwards=false
• 关键词: IRES; International; Research; Experience; Students

Non-Technical Abstract: This project will enable U.S. students to conduct high-quality research on design automation of three dimensional integrated circuits (3D ICs), in collaboration with their faculty mentors at National Tsing Hua University (NTHU) in Taiwan. Such experiences expose U.S. students to the international research community at a critical early stage in their careers. It is expected that through participating in this project, U.S. students will gain extensive experience on the research of 3D ICs, on the international semiconductor prospects, on the culture in Taiwan, and on performing and collaborating in an international environment in general. The experience will also be shared to the broader community through the involvement of personal social media, Web 2.0 based forum, carefully integrated activities such as research for undergraduate students, as well as outreach events for local schools. In particular, this project will have a dedicated focus on the career development of minorities and underrepresented groups.Technical Abstract: This IRES project provides U.S. students with valuable research experience related to the design automation of three-dimensional integrated circuits (3D ICs) in Hsin-Chu, Taiwan, where the world's largest semiconductor industry is located. The project will select five (5) graduate students and two (2) undergraduate students nation-wide each year and support them to visit the Computer Science Department at National Tsing Hua University (NTHU) over a period of twelve (12) weeks. They will be mentored by the professors at NTHU. The primary research objective is to address fundamental issues in 3D ICs and to bridge the gap between advanced 3D fabrication processes and the designers using these technologies. The Moore's Law states that the transistor density on integrated circuits doubles approximately every two years. However, this trend is becoming increasingly difficult to keep due to the high cost associated with semiconductor scaling. Accordingly, the semiconductor industry has started to look for alternative technologies that offer a path beyond the limits of device scaling. Among all the possible alternatives, the three-dimensional integrated circuit (3D IC) is generally considered to be the most promising one, at least in the next decade, for its full compatibility with current technologies. Instead of making transistors smaller, it stacks multiple chips vertically for higher integration density, shorter wirelength, smaller footprint, higher speed, and lower power consumption. As such, 3D IC has become a very hot topic in academic research and industry practice in recent years. The students will work on projects related to the yield enhancement of 3D ICs and the novel design flows for two promising 3D technologies - interposer-based 3D ICs and monolithic 3D ICs. The research can significantly increase the yield of 3D ICs without involving area penalty. It is anticipated that the breakthroughs from this IRES project at NTHU can have a direct impact on the 3D IC industry.

非技术摘要：该项目将使美国学生能够与台湾国家TSING HUA大学（NTHU）的教职员工合作，对三维综合电路（3D IC）的设计自动化进行高质量的研究。这种经验使美国的学生在职业生涯的重要早期阶段暴露于国际研究界。可以预期，通过参加该项目，美国学生将在3D IC，国际半导体前景，台湾文化以及一般的国际环境中的表演和合作方面获得丰富的经验。通过个人社交媒体，基于Web 2.0的论坛，精心整合的活动，例如针对本科生的研究以及针对当地学校的外展活动，这一经验也将通过个人社交媒体，基于Web 2.0的论坛，精心整合的活动来分享。特别是，该项目将专门关注少数群体和代表性不足的群体的职业发展。技术摘要：该IRES项目为美国学生提供了与台湾Hsin-Chu的三维集成电路（3DIC）的设计自动化相关的宝贵研究经验，台湾，台湾，世界上最大的半束缚行业。该项目将每年在全国范围内选择五（5）名研究生和两（2）名本科生，并支持他们在十二（12）周期间访问美国国家TSING HUA University（NTHU）的计算机科学系。他们将受到NTHU的教授的指导。主要的研究目标是解决3D IC中的基本问题，并使用这些技术弥合高级3D制造过程与设计人员之间的差距。摩尔定律指出，综合电路上的晶体管密度大约每两年加倍。但是，由于与半导体缩放相关的高成本，这种趋势变得越来越难。因此，半导体行业已开始寻找替代技术，这些技术提供了超出设备扩展限制的路径。在所有可能的替代方案中，三维集成电路（3D IC）通常被认为是最有前途的综合电路，至少在未来十年中，它与当前技术的完全兼容。它没有使晶体管较小，而是垂直堆叠多个芯片，以提高整合密度，较短的电线，较小的占地面积，更高的速度和较低的功耗。因此，近年来，3D IC已成为学术研究和行业实践中的一个非常热门的话题。这些学生将研究与3D IC的产量提高和两种有前途的3D技术的新型设计流有关的项目 - 基于Interposer的3D IC和Monolithic 3D IC。这项研究可以显着提高3D IC的产量，而无需涉及面积罚款。可以预计，NTHU的IRES项目的突破可能会对3D IC行业产生直接影响。