CSR: Small: A Time-Predictable Integrated CPU-GPU Architecture for Hard Real-Time Systems

CSR：小型：用于硬实时系统的时间可预测集成 CPU-GPU 架构

• 批准号: 1421577
• 负责人: Wei Zhang
• 金额: $ 50万
• 依托单位: Virginia Commonwealth University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2014
• 资助国家: 美国
• 起止时间: 2014-10-01 至 2019-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1421577&HistoricalAwards=false
• 关键词: CSR; Small; Time; Predictable; Integrated

Massive and energy-efficient computation capability, coupled with the enhanced programmability, makes Graphics Processing Units (GPUs) a desirable platform to accelerate a variety of data-intensive hard real-time applications such as medical data processing, autonomous auto navigation, and vision-based aircraft controls. The computer industry has already delivered several GPUs for embedded computing applications. However, none of these GPUs can guarantee time predictability, which is crucial for hard real-time systems. The integration of the CPU and the GPU on the same die makes it even more challenging to attain time predictability. The goal of this project is to fill this need, though investigation of the design of time-predictable integrated CPU-GPU architectures that can also offer high performance and energy efficiency.The project addresses this problem by: (i) systematic analysis and evaluation of time-unpredictability of GPUs and integrated CPU-GPUs; (ii) exploration of time-predictable and heterogeneous last-level cache (LLC) architectures for integrated CPU-GPUs, including private, partitioned, and locked LLCs; (iii) design of time-predictable and heterogeneous on-chip interconnection networks that can efficiently support communications within and across the CPUs and GPU; (iv) design of time-predictable memory controllers to enable scalable, safe, and tight WCET (Worst-Case Execution Time) estimation; (v) development of the first WCET analyzer for the proposed integrated CPU-GPU processor to support hard real-time computing. Other project activities include efforts to transition the results of the research to industry, integration of topics and projects related to the research in courses, and open-source distribution of software.

海量且节能的计算能力，加上增强的可编程性，使图形处理单元（GPU）成为加速各种数据密集型硬实时应用程序的理想平台，例如医疗数据处理、自主汽车导航和视觉。基于飞机的控制。计算机行业已经为嵌入式计算应用提供了多种 GPU。然而，这些 GPU 都无法保证时间可预测性，而这对于硬实时系统至关重要。 CPU 和 GPU 集成在同一个芯片上，使得实现时间可预测性变得更加困难。 该项目的目标是通过研究可提供高性能和能效的时间可预测集成 CPU-GPU 架构的设计来满足这一需求。该项目通过以下方式解决此问题：(i) 系统分析和评估GPU 和集成 CPU-GPU 的时间不可预测性； (ii) 探索用于集成 CPU-GPU 的时间可预测和异构末级缓存 (LLC) 架构，包括私有、分区和锁定的 LLC； (iii) 设计时间可预测的异构片上互连网络，能够有效支持 CPU 和 GPU 内部和之间的通信； (iv) 设计时间可预测的内存控制器，以实现可扩展、安全和严格的 WCET（最坏情况执行时间）估计； (v) 为拟议的集成 CPU-GPU 处理器开发第一个 WCET 分析器，以支持硬实时计算。 其他项目活动包括将研究成果转化为行业的努力、将与研究相关的主题和项目整合到课程中以及软件的开源分发。