An Assessment of Options for Post-CMOS Emerging Research Devices and Related Materials: Four Workshops to be Held in 2012 in the Netherlands, Canada, France and San Francisco.

对后 CMOS 新兴研究器件和相关材料选项的评估：2012 年将在荷兰、加拿大、法国和旧金山举办四场研讨会。

• 批准号: 1237813
• 负责人: Victor Zhirnov
• 金额: $ 4万
• 依托单位: Semiconductor Research Corporation
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-06-15 至 2013-05-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1237813&HistoricalAwards=false
• 关键词: Assessment; Options; Post; CMOS; Emerging

ObjectiveThe objective of this project is to conduct an international series of four face-to-face workshopsto assess quantitatively the potential and status of four topics related to research on nanoelectronicsdevices and materials. The topics are: Emerging Research Memory Devices, Emerging ResearchLogic Devices, Emerging Research Architectures, and Emerging Research Materials critical forthe realization of specific nanoelectronics devices. Participants and contributors to theseworkshops will include academic and industrial domain experts. The outputs of these workshopswill guide and input preparation of the 2013 International Technology Roadmap for Semiconductorschapters on Emerging Research Devices and Emerging Research Materials. This grant willbe used to pay partial travel expenses for some presenters, particularly academics, requestingtravel assistance.The workshops series will focus on the relationship between the Semiconductor Industry asit endeavors to continue to advance semiconductor technology and the work of the NationalNanotechnology Initiative (NNI) research community. One purpose of these meetings is to evaluatethe potential and status of each specific nanotechnology entry identified by the ITRS ERD/ERMWorking Groups as having potential to enable a new paradigm for information processing. Anotherpurpose is to identify research opportunities that, if addressed, will benefit the SemiconductorIndustry and fall within the scope of the NNI research agenda. Presenters will be providedwith a list of questions that are intended to stimulate discussions during the workshops.Each workshop will be documented by a report described below.Intellectual MeritIn bringing together leading academic and industrial scientists to discuss, debate and reachconsensus on the potential performance and key scientific challenges related to several emergingresearch memory and logic device technologies, these workshops will provide an excellent forumfor intellectual pursuit and discernment of important/limiting scientific issues related toapproaches to information processing. The intellectual merit of these workshops is illustratedby way of example.In the first example, the physics of operation and extreme scaling projections are not wellunderstood for ?select devices? required for use in nanoscale memory arrays. These selectdevices are needed to employ a new class of non-volatile memory cells, called resistive randomaccess memory (ReRAM),that may replace NAND flash for technology generations beyond the 16nmtechnology node. Generally speaking, a memory cell in an array can be viewed as being composedof two fundamental components: a ?storage node?, which is usually characterized by the physicsof operation of the particular memory device used, and a ?selector?. The selector is a devicewhich allows a given memory cell in an array to be singularly addressed for read or writeoperation without addressing its nearest neighbor cells. It is a non-linear element, whichcan operate as a switch, such as a diode-type, or as a resistive-switch-type structure. Thelatter category includes novel concepts such as Mott switches, threshold switches, and mixedionic electronic conduction switches. Understanding the dominant physics related to theirnon-linear I-V characteristics is essential to employing these select devices in a highlydense non-volatile ReRAM crossbar architecture. It should be noted that for several advancedconcepts of ReRAM, the storage node in principle can be scaled down below 10 nm, and the memorydensity will be limited by a somewhat larger conventional three-terminal select device. Thusthe select device represents a serious bottleneck for scaling a ReRAM memory cell to 16 nmand beyond. Application of these new non-volatile memory devices to a crossbar memory structurewill enable a paradigm shift to a new storage class memory (SCM) off-chip memory architecturediscussed below.Another example, related to logic, is a family of new nanoelectronic low subthreshold-swingdevices: e.g., negative Cg devices. These devices offer the attractive possibility of performinghigh speed logic while dissipating much lower power compared to a conventional MOSFET. Thecircuit design and the academic research communities have a expressed a strong interest forthe ERD Technical Working Group to explore the physics of operation of these devices and thecircuit design space in which they can operate in order to better understand their potentialperformance. This information will provide important input to these communities regardingtheir accelerating development of low-power electronics.Broader ImpactBy carefully assessing the potential performance and scientific/technological challenges foreach new memory select device and of new low-power logic devices, as well as emerging architectures,these workshops will provide important documented inputs to the research community as theypursue their exploration of many emerging research devices.One venue being initiated to obtain broad dissemination of this information is the editingand publication of a comprehensive book on nanoelectronics entitled ?Emerging NanoelectronicDevices?. A proposal is under review by a major publisher who has expressed considerable interest.Furthermore, the educational value and planning impact of these workshops on the internationalresearch community are quite substantial. Several universities (e.g., Stanford, U. Minnesota,U. Tokyo,?) use the ITRS chapters on Emerging Research Devices and Emerging Research Materialsresulting from these workshops as texts in their Nanoelectronics courses. Also several internationalresearch funding agencies (e.g., SRC, NSF, and NIST Nanoelectronics Research Initiative, theEU Framework Program 8, ?) use the material in these chapters as inputs to their decisionson research directions in their Nanoelectronics research programs.

该项目的目标是进行四个面对面讲习班的国际系列，定量评估与纳米电子研究和材料研究有关的四个主题的潜力和状态。主题是：新兴的研究记忆设备，新兴的研究知识设备，新兴的研究架构以及新兴的研究材料对于实现特定纳米电子设备至关重要。这些工作室的参与者和贡献者将包括学术和工业领域专家。这些研讨会指南的输出和针对新兴研究设备和新兴研究材料的2013年国际技术路线图的投入准备。这笔赠款的意愿用于为某些演示者，尤其是学者支付部分旅行费用，请求Travel援助。该研讨会系列将重点介绍半导体行业ASIT努力之间的关系，以继续推进半导体技术和国家NANANOTECHOCHOLOGY INTIATIVE（NNI）研究社区的工作。这些会议的目的之一是评估由ITRS ERD/ERMWORKING组确定的每个特定纳米技术条目的潜在和状态，因为他们有可能启用新的范式进行信息处理。另一种用途是确定研究机会，如果解决的话，将受益于半导体，并属于NNI研究议程的范围。 Presenters will be providedwith a list of questions that are intended to stimulate discussions during the workshops.Each workshop will be documented by a report described below.Intellectual MeritIn bringing together leading academic and industrial scientists to discuss, debate and reachconsensus on the potential performance and key scientific challenges related to several emergingresearch memory and logic device technologies, these workshops will provide an excellent forumfor intellectual pursuit and discernment of important/limiting与信息处理有关的科学问题。这些研讨会的智力优点是例子的示例。在第一个例子中，操作的物理和极端缩放预测是否对“精选设备”没有很好地忽略吗？在纳米级内存数组中使用所需。需要这些SelectDevices来采用一类新的非易失性存储单元，称为电阻随机存储器（RERAM），该单元可能会代替16nMtechnology节点以外的技术世代的NAND Flash。一般而言，数组中的存储单元可以看作是组成两个基本组件的组成：a？存储节点？，通常以所使用的特定存储器设备的物理操作和？选择器？的特征。选择器是一种设备，在数组中允许给定的内存单元格在不解决其最近的邻居单元的情况下进行读取或写作。它是一个非线性元素，可以用作开关（例如二极管型）或电阻开关型结构。 THELATTER类别包括新颖的概念，例如Mott开关，阈值开关和混合电子传导开关。了解与Hison-Linarear I-V特征相关的主要物理学对于在高度密度的非挥发性重新兰横杆架构中使用这些精选设备至关重要。应该注意的是，对于重新拉接的几个高级概念，可以将存储节点原则上的缩放缩放在10 nm以下，并且存储密度将受到较大的常规三端选择设备的限制。因此，SELECT设备代表了将重新兰存存储单元缩放到16 nmand的严重瓶颈。将这些新的非易失性存储器设备应用于横栏内存结构将使范式转移到下面的新存储类内存（SCM）芯片内存架构架构上。这些设备提供了表现速度逻辑的有吸引力的可能性，同时与传统MOSFET相比，功率要低得多。 TheCircuit设计和学术研究社区对ERD技术工作组表示了强烈的兴趣，探索这些设备的操作和thecircuit设计空间的物理学，以便更好地了解其潜在的性能。该信息将为这些社区提供重要的投入，以加快低功率电子设备的发展。Baroader仔细评估AEXEACH新的记忆选择设备以及新的低功率逻辑设备的潜在性能和科学/技术挑战，以及新兴的架构，这些研讨会将为他们提供了许多范围的研究社区，以启动研究范围。在此信息中，关于纳米电子学的综合书的编辑和出版物，题为“新兴纳米电子”？一位主要出版商正在审查一项提案，该提案表达了极大的兴趣。法人，这些研讨会对国际研究社区的教育价值和计划影响非常大。几所大学（例如，美国明尼苏达州斯坦福大学，美国东京，？）使用ITR章节，以在新兴的研究设备和新兴的研究材料中作为纳米电子学课程中的文本作为文本进行培养。还有几个国际研究机构（例如SRC，NSF和NIST纳米电子研究计划，EUU框架计划8，？）使用这些章节中的材料作为其纳米电子研究计划中其决策研究指示的投入。