SHF: Large:Collaborative Research: Architecting the Next Generation Memory Hierarchy - A Holistic Approach

SHF：大型：协作研究：构建下一代内存层次结构 - 整体方法

• 批准号: 1213052
• 负责人: Chitaranjan Das
• 金额: $ 136万
• 依托单位: Pennsylvania State Univ University Park
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-08-01 至 2017-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1213052&HistoricalAwards=false
• 关键词: SHF; Large; Collaborative; Research; Architecting

The memory system continues to be a major performance and powerbottleneck in nearly all computing systems. And, it is becomingincreasingly more so with major application, architecture, andtechnology trends. Embedded applications that acquire andprocess real-time data, Internet and cloud applications that have toanalyze large databases, and the exa-scale era HPC applications thatneed to crunch voluminous data sets are just a few examples ofincreasingly data-intensive applications that require high memorycapacity, performance, and energy efficiency. Thus, the well-known memory wall problem has become even more difficult to surmount andneeds a fundamental rethinking of the memory hierarchy design for futurecomputing platforms.The goal of this proposal is to fundamentally and holisticallyrethink the design of the entire memory hierarchy taking into considerationthe emerging device/memory technologies and to exploit the design trade-offsat different layers of the system stack -- from devices to micro-architecture,compilers and runtime systems. The solution will cover innovations inarchitecting and optimizing the entire memory path consisting of the caches,on-chip networks, memory controller and main memory. The objectiveis to enable 100X improvement in memory capacity over the nextdecade, while providing 5X improvement in performance and10X improvement in energy efficiency. The proposed research has the potential to transform the design ofnext-generation memory systems for the multi-core era, which is expectedto be a ubiquitous part of the entire IT sector.The cross-cutting nature of this research can foster new research directionsin several areas, spanning technology/energy-aware design, computer architecture,compilers, and system/application software. With the memory system formingthe backbone of nearly every envisioned future application domain, thebroader impact of this research can accelerate the design and deploymentof future applications. This project will enable transfer of researchresults to industry, enhance undergraduate and graduate student trainingincluding under-represented students, and contribute to the development of newresearch and teaching tools.

内存系统仍然是几乎所有计算系统的主要性能和功率瓶颈。而且，随着主要应用程序、架构和技术趋势的发展，这种情况变得越来越严重。获取和处理实时数据的嵌入式应用程序、必须分析大型数据库的互联网和云应用程序以及需要处理大量数据集的超大规模 HPC 应用程序只是需要高内存容量和性能的日益数据密集型应用程序的几个示例和能源效率。因此，众所周知的内存墙问题变得更加难以克服，需要对未来计算平台的内存层次结构设计进行根本性的重新思考。该提案的目标是从根本上、全面地重新思考整个内存层次结构的设计，同时考虑到新兴的技术设备/内存技术，并利用系统堆栈不同层的设计权衡——从设备到微架构、编译器和运行时系统。该解决方案将涵盖架构和优化整个内存路径的创新，包括缓存、片上网络、内存控制器和主内存。目标是在未来十年内将内存容量提高 100 倍，同时将性能提高 5 倍，将能源效率提高 10 倍。所提出的研究有可能改变多核时代下一代存储系统的设计，预计多核时代将成为整个 IT 领域无处不在的一部分。这项研究的交叉性质可以在多个领域培育新的研究方向，涵盖技术/能源感知设计、计算机体系结构、编译器和系统/应用软件。 由于内存系统构成了几乎所有设想的未来应用领域的支柱，这项研究的更广泛影响可以加速未来应用的设计和部署。该项目将促进研究成果向行业的转化，加强本科生和研究生的培训，包括代表性不足的学生，并为新的研究和教学工具的开发做出贡献。