SHF: Small: Formal Synthesis of Low-Energy Signal Processing Systems Relying on Controlled Timing-Error Acceptance

SHF：小型：依赖于受控定时误差接受的低能量信号处理系统的形式综合

• 批准号: 1018075
• 负责人: Andreas Gerstlauer
• 金额: $ 44.97万
• 依托单位: University of Texas at Austin
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2010
• 资助国家: 美国
• 起止时间: 2010-09-01 至 2015-08-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1018075&HistoricalAwards=false
• 关键词: SHF; Small; Formal; Synthesis; Low

Improving energy efficiency of embedded and mobile systems is a major design challenge. Such systems involve complex algorithms for audiovisual processing, recognition, and communication that heavily utilize digital signal processing (DSP) architectures. This proposal advances a systematic strategy to reduce energy consumption of DSP sub-systems and thereby make major strides towards a new generation of low-energy embedded applications. The main premise behind the proposal is that signal processing algorithms may accept, in a finely controlled manner, some amount of timing errors in return for significant energy savings. Signal processing algorithms have an intrinsic quality floor, set by quantization and roundoff noise. A traditional design paradigm of worst-case margining is highly suboptimal, and by accepting a small amount of low-probability timing errors, significant energy savings of more than 50% are possible.Research under this proposal will result in the development of a formal analysis and synthesis framework for integration into a hardware synthesis flow that supports systematic design of ultra low-energy error-permissive DSP systems. A flow for controlled acceptance of timing errors must fundamentally be based on a new formal notion of quality-energy (Q-E) tradeoff, which is unique to error-permissive signal processing, and which will allow treatment of other Q-E techniques, such as approximate signal processing, consistently within the same framework. To this end, the goals of this project are two-fold: (i) to formally develop models and analysis techniques for controlled timing-error acceptance under given input statistics and quality-energy budgets, and (ii) to develop a comprehensive synthesis flow that allows multiple Q-E techniques to be applied to the co-optimization of quality, energy, area and performance objectives for a large class of algorithms that can generally tolerate a small amount of errors. Results of this work will enable automatic exploration of joint algorithm and architecture tradeoffs for implementation of general quality- and energy-tuned error-permissive systems. The new controlled timing error paradigm will facilitate sustained improvement in the energy efficiency of integrated circuits and digital systems, where ultra low-energy operation will enable use of hitherto infeasible portable, implantable, wireless and autonomous systems.

提高嵌入式和移动系统的能源效率是一个主要的设计挑战。此类系统涉及大量利用数字信号处理（DSP）体系结构的视听处理，识别和通信的复杂算法。该提案采取了一种系统的策略，以减少DSP子系统的能源消耗，从而迈向新一代的低能量嵌入式应用。该提案背后的主要前提是，信号处理算法可以以精致的方式接受一些定时错误，以回报大量的能源节省。信号处理算法具有固有的质量底层，由量化和圆形噪声设置。传统的最坏情况边缘的设计范式是高度次优的，通过接受少量低概率的时序误差，可能可以节省大量50％以上。在此建议下，研究将导致形式分析和合成框架的形式分析和合成框架，以集成到硬件合成中，以支持超级效果的系统性设计。从根本上讲，控制正时错误的流动必须基于一种新的质量能量（Q-E）折衷的正式概念，该质量 - Q-E）的折衷是误解了错误的信号处理，并且将允许对其他Q-E技术进行处理，例如近似信号处理，始终如一地在同一框架内。为此，该项目的目标是两个方面：（i）在给定的输入统计数据和质量能量预算下正式开发用于受控的计时 - 错误接受的模型和分析技术，以及（ii）开发一种全面的合成流，允许多个Q-E技术适用于质量，能源的质量，较大的目标和较大的效果，以供多个质量，大量的目标，大量的级别的能力，该级别的较大的目标是该级别的较大的目标。这项工作的结果将能够自动探索联合算法和建筑折衷方案，以实施一般质量和能源调整的误解系统。新的受控正时错误范式将有助于综合电路和数字系统的能源效率的持续提高，在这些电路和数字系统的能源效率下，超低能操作将有助于使用迄今不可避免的便携式，可植入，无线和自主系统。