SGER: Investigating the Turbo Principle for Reliable Energy-Efficient Networks-on-Chip

SGER：研究可靠节能片上网络的 Turbo 原理

• 批准号: 0733450
• 负责人: Paul Ampadu
• 金额: --
• 依托单位: University of Rochester
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-06-01 至 2008-11-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0733450&HistoricalAwards=false
• 关键词: SGER; Investigating; Turbo; Principle; Reliable

ECCS-0733450P. Ampadu, University of RochesterIntellectual Merit:This exploratory research investigates the feasibility and applicability of the turbo principle to the design of reliable nanometer scale networks-on-chip. The turbo principle involves three main ideas-(1) cooperative encoding and decoding employing spatial, information, and temporal redundancy; (2) pseudo-random interleaving that spreads noise; (3) iterative estimation for reduced complexity and energy-efficiency. This research will examine hardware-amenable methods that embrace cooperation, interleaving, and iterative estimation jointly to improve reliability and better manage the increased wiring complexity resulting from on-chip integration of thousands of cores. Specific research tasks to be performed include (1) developing joint reliability and energy-efficiency metrics appropriate for networks-on-chip; (2) determining suitable interconnection topologies that optimize spatial redundancy; (3) investigating packet interleaving with proper organization of on-chip switches and routers to enable low-latency data aggregation at the nodes; (4) developing specific turbo-like encoding and decoding algorithms for near-optimal joint reliability and energy-efficiency.Broader Impact:This research will benefit both the nanoelectronics and emerging technologies communities, as physical interconnect and reliability are at the forefront of critical bottlenecks for ultra-large scale integration. The foundational knowledge acquired in this research will be disseminated to researchers and practitioners, accelerating research in networks-on-chip and multicore systems-on-chip, as well as other emerging nanoscale technologies. Results from this exploratory research will find direct application and synergy in a graduate level course developed by the PI, termed VLSI Error Control Systems. Further, this research will train one graduate student in a focused interdisciplinary study of networks-on-chip, information theory, communications, and integrated systems design. The PI is actively engaged in community outreach to local middle and high schools, working closely with teachers and principals to foster increased participation of underrepresented groups in science and engineering. An experimental workshop that explores methods for building entrepreneurship through innovations in systems reliability is planned with local high schools, encouraging participation, particularly from underrepresented groups. A rudimentary course on networks-on-chip will be jointly developed by the PI and some local high school teachers prior to participation in the workshops

ECCS-0733450p。 Rochesterintlectual的Ampadu，Ampadu：这项探索性研究调查了涡轮原理对可靠的纳米尺度网络在芯片上设计的可行性和适用性。涡轮原则涉及三个主要思想 - （1）采用空间，信息和时间冗余的合作编码和解码； （2）伪随机交错，传播噪声； （3）降低复杂性和能源效率的迭代估计。这项研究将检查硬件不典型的方法，这些方法可以共同采用合作，交织和迭代估算，以提高可靠性，并更好地管理因数千个内核的芯片整合而导致的增加的接线复杂性。要执行的特定研究任务包括（1）开发适合芯片网络的关节可靠性和能源效率指标； （2）确定优化空间冗余的合适互连拓扑； （3）调查数据包与适当组织的片上开关和路由器进行交织，以使节点处的低延迟数据聚合； （4）开发特定的类似涡轮增压的编码和解码算法，以实现近乎最佳的关节可靠性和能源效率。BROADER的影响：这项研究将使纳米电子学和新兴技术群落受益，因为物理互连和可靠性是关键瓶颈的最前沿，以实现超高级尺度的关键瓶颈。在这项研究中获得的基本知识将被传播给研究人员和从业人员，并加快芯片上网络和芯片多功能系统的研究，以及其他新兴的纳米级技术。这项探索性研究的结果将在PI开发的研究生级课程中发现直接应用和协同作用，称为VLSI错误控制系统。此外，这项研究将培训一名研究生，对片上网络，信息理论，通信和集成系统设计的集中跨学科研究。 PI积极参与与当地中学和高中的社区宣传，与教师和校长紧密合作，以促进代表性不足的科学和工程学的参与。一个实验研讨会探讨了通过系统可靠性创新来建立创业方法的方法，并计划在当地高中，鼓励参与，尤其是来自代表性不足的群体。在参加研讨会之前，PI和一些当地高中教师将共同开发有关芯片网络的基本课程