Bridging the Compiler-Simulator Gap: Faster and Easier Hardware/Software Optimization

缩小编译器与模拟器之间的差距：更快、更轻松的硬件/软件优化

• 批准号: 0310988
• 负责人: J. Eliot Moss
• 金额: $ 30万
• 依托单位: University of Massachusetts Amherst
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2003
• 资助国家: 美国
• 起止时间: 2003-08-15 至 2007-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0310988&HistoricalAwards=false
• 关键词: Bridging; Compiler; Simulator; Gap; Faster

Making computers go fast requires optimizing software that exploits thehardware. Exploring new hardware ideas requires hardware simulators, ANDoptimizing software matching the imagined hardware. It is time-consumingand error-prone to build these and get them to match. The CoGenT project isautomating the building of simulators and matching software tools, so thatmore people can explore more ideas, more quickly, for modern computers andprogramming languages.CoGenT, which stands for Co-Generation of (simulation and compilation)Tools, with machine descriptions. From instruction format, execution, andtiming information, we produce predictive simulators for Java programs onthe described hardware. The Java system includes optimizing andnon-optimizing compilers, and we retarget both compilers to the targethardware. We do this by using the same description forms for the compiler'sabstract machine as for the hardware target. We generate code generationrules by searching for target instructions to match each possible abstractcode fragment. We are also concerned with automated construction of therest of the compiler back end, and with efficiency of the simulators we build.While certain hardware innovations clearly demand entirely new techniquesto exploit them effectively, we automate those aspects addressed in theexisting optimizing compiler. Our contributions lie in the increased degreeof automation and integration of the techniques, and in improved simulatorperformance. While the primary setting is simulation, the results areuseful in compiler retargeting, dynamic binary translation, and beyond.

使计算机快速运行需要优化利用磁性软件的软件。探索新的硬件想法需要硬件模拟器，并将与想象中的硬件相匹配的软件达到优化。构建这些并使它们匹配是耗时的，并且容易出错。该项目的项目是构建模拟器和匹配的软件工具的构建，因此，更多人可以更快地探索更多的想法，对于现代计算机和程序语言。从指令格式，执行和提示信息，我们在描述的硬件上为Java程序生成了预测性模拟器。 Java系统包括优化和Non-Aptimigation的编译器，我们将两个编译器都重新定为Targethardware。我们通过为编译器的s tractract机与硬件目标使用相同的描述表格来做到这一点。我们通过搜索目标说明来匹配每个可能的抽象码片段来生成代码生成。我们还关心编译器后端的自动构造，并借助我们构建的模拟器的效率。虽然某些硬件创新显然要求全新的技术有效地利用它们，但我们可以自动化这些方面，以实现优化编译器的备用方面。我们的贡献在于自动化程度的提高和技术的整合，并改善了模拟性持续性。尽管主要设置是仿真的，但结果在编译器重新定位，动态二进制翻译及其他方面都可以使用。