Performance-Driven CAD Tools for Asynchronous Circuits

适用于异步电路的性能驱动 CAD 工具

• 批准号: 9812164
• 负责人: Peter Beerel
• 金额: $ 34.09万
• 依托单位: University of Southern California
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 1998
• 资助国家: 美国
• 起止时间: 1998-07-15 至 2001-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=9812164&HistoricalAwards=false
• 关键词: Performance; Driven; CAD; Tools; Asynchronous

Asynchronous designs are an attractive alternative to synchronous designs due to their lack of clock skew problems, potential for average-case delays, adaptability to physical properties, and power savings. This project focuses on techniques for performance-analysis and performance- driven synthesis that together can facilitate the design of high-performance asynchronous circuits. For performance analysis, the investigator is exploring analytical and simulation-based analysis techniques that can guide architectural design as well as guide controller synthesis tools to optimize for user-specified system performance metrics. For synthesis, the research is leveraging off an existing technology mapping tool that uses minimal system information to identify and then optimize common transitions. By increasing the amount of system information available, selected critical transitions can be optimized. In these designs common transitions need not be critical and critical

异步设计是同步设计的有吸引力的替代品，因为它们缺乏时钟偏斜问题，平均案例延迟的潜力，对物理特性的适应性以及节能。该项目着重于性能分析和性能驱动综合的技术，可以共同促进高性能异步电路的设计。为了进行性能分析，研究者正在探索基于分析和仿真的分析技术，这些技术可以指导建筑设计以及指南控制器合成工具，以优化用户指定的系统性能指标。对于综合，该研究利用了使用最小系统信息来识别然后优化常见过渡的现有技术映射工具。通过增加可用系统信息的量，可以优化选定的关键转换。 在这些设计中，常见过渡不必是至关重要的