Optimized pulsed write schemes improve linearity and write speed for low-power organic neuromorphic devices

Neuromorphic devices are becoming increasingly appealing as efficient emulators of neural networks used to model real world problems. However, no hardware to date has demonstrated the necessary high accuracy and energy efficiency gain over CMOS in both (1) training via backpropagation and (2) in read via vector matrix multiplication. Such shortcomings are due to device non- idealities, particularly asymmetric conductance tuning in response to uniform voltage pulse inputs. Here, by formulating a general circuit model for capacitive ion-exchange neuromorphic devices, we show that asymmetric nonlinearity in organic electrochemical neuromorphic devices (ENODes) can be suppressed by an appropriately chosen write scheme. Simulations based upon our model suggest that a nonlinear write- selector could reduce the switching voltage and energy, enabling analog tuning via a continuous set of resistance states (100 states) with extremely low switching energy (similar to 170 fJ.mu m(-2)). This work clarifies the pathway to neural algorithm accelerators capable of parallelism during both read and write operations.

神经形态器件作为用于对现实世界问题进行建模的神经网络的高效模拟器，正变得越来越有吸引力。然而，到目前为止，还没有任何硬件在（1）通过反向传播进行训练以及（2）通过向量矩阵乘法进行读取这两方面都展示出相对于CMOS所必需的高精度和能效提升。这些缺陷是由于器件的非理想性，特别是对均匀电压脉冲输入响应的不对称电导调节。在此，通过为电容性离子交换神经形态器件建立一个通用电路模型，我们表明有机电化学神经形态器件（ENODes）中的不对称非线性可以通过适当选择的写入方案来抑制。基于我们模型的模拟表明，一个非线性写入选择器可以降低开关电压和能量，从而能够通过一组连续的电阻状态（100个状态）进行模拟调节，且开关能量极低（类似于170飞焦每平方微米）。这项工作阐明了通往在读写操作过程中都能够并行的神经算法加速器的途径。