Automatic die placement and flexible I/O assignment in 2.5D IC design

This paper presents a problem formulation and procedure for design automation of 2.5D interposer-based multi-die ICs. Our approach is designed for (but not limited to) 2.5D ICs that contain one or more dies with flexible I/Os - such as FPGA dies. Given a set of dies, inter-die connections, I/O standard(s) for the connections, and a set of valid die pins for the connections, we simultaneously place dies on an interposer, assign pins to each inter-die connection, and assign specific voltages to I/O bank power supplies of the FPGA dies to produce a valid layout and pin assignments for the design. To our knowledge, this is the first formulation and methodology to consider flexible I/Os in 2.5D design automation. We demonstrate the effectiveness of our procedure through a variety of example 2.5D designs containing different types of interconnected dies.

本文提出了一种基于2.5D中介层的多芯片集成电路设计自动化的问题表述和流程。我们的方法是为（但不限于）包含一个或多个具有灵活输入/输出（I/O）的芯片（如FPGA芯片）的2.5D集成电路设计的。给定一组芯片、芯片间连接、连接的输入/输出标准以及连接的一组有效芯片引脚，我们同时将芯片放置在中介层上，为每个芯片间连接分配引脚，并为FPGA芯片的输入/输出组电源分配特定电压，以便为设计生成有效的布局和引脚分配。据我们所知，这是在2.5D设计自动化中考虑灵活输入/输出的第一种表述和方法。我们通过各种包含不同类型互连芯片的2.5D设计示例展示了我们流程的有效性。