Swapping-Centric Neural Recording Systems

Neural interfaces read the activity of biological neurons to help advance the neurosciences and offer treatment options for severe neurological diseases. The total number of neurons that are now being recorded using multi-electrode interfaces is doubling roughly every 4-6 years [5]. However, processing this exponentially-growing data in real-time under strict power-constraints puts an exorbitant amount of pressure on both compute and storage within traditional neural recording systems. Existing systems deploy various accelerators for better performance-per-watt while also integrating NVMs for data querying and better treatment decisions. These accelerators have direct access to a limited amount of fast SRAM-based memory that is unable to manage the growing data rates. Swapping to the NVM becomes inevitable; however, naive approaches are unable to complete during the refractory period of a neuron – i.e., a few milliseconds – which disrupts timely disease treatment. We propose co-designing accelerators and storage, with swapping as a primary design goal, using theoretical and practical models of compute and storage respectively to overcome these limitations.

神经接口读取生物神经元的活动，以助力神经科学的发展，并为严重的神经疾病提供治疗方案。目前使用多电极接口记录的神经元总数大约每4 - 6年就会翻倍[5]。然而，在严格的功率限制下实时处理这些呈指数增长的数据，给传统神经记录系统中的计算和存储都带来了巨大压力。现有系统部署了各种加速器以提高每瓦性能，同时还集成了非易失性存储器（NVM）用于数据查询和更好的治疗决策。这些加速器可以直接访问有限的基于静态随机存取存储器（SRAM）的快速内存，这种内存无法管理不断增长的数据速率。切换到非易失性存储器是不可避免的；然而，简单的方法无法在神经元的不应期（即几毫秒）内完成，这会干扰疾病的及时治疗。我们建议共同设计加速器和存储，将切换作为主要设计目标，分别使用计算和存储的理论和实践模型来克服这些限制。