金属上外延大面积高质量硅插层石墨烯的纳电子器件研究

It is critical to investigate the synthesis of large scale and high quality graphene, fabrication of the electronic devices and integration of nanocircuits for its future applications in semiconductor industry. Direct epitaxial growth of graphene on single crystal metal substrates or thin films, and intercalation of Si layer or SiOx layer into the interface between graphene and metal substrates or thin films, and fabrication of nanoelectronic devices and final integration of nanocircuits is a potential route, providing a desirable platform and strong motivation for graphene research. In this project, we are proposing to epitaxially grow monolayer and single crystalline graphene in milimeter scale, then intercalate Si layers into the interface between the metal substrates or thin films and graphene with controllable thickness, and oxize the Si layers by tuning the experimental parameters in a precise way, yielding a reliable insulating dielectric layer for in-situ fabrication of nanoelectronic devices based on the high quality graphene; then investigate the fabrication process of the electronic devices and measure their electronic transport characteristics; by controlling the interface features between graphene and intercalated Si layers, investigate the heterostructure of graphene-Si on metal substrate and their transport response in longitudinal direction; finallly in-situ fabrication of nanoelectronic devices like field-effect transistors and logic gates, and combine them together to construct nanocircuits and test their electronic performance, exploring a reliable way for direct fabrication of electronic devices and construction of nanocircuits after epitaxial growth.

探索合成大面积、高质量的石墨烯的方法、研究其电子器件性能并构筑纳米电路对于未来石墨烯在半导体工业的应用具有重要意义。直接在金属单晶基底（薄膜）上外延石墨烯层，并在石墨烯与金属基底（薄膜）界面处插入半导体Si层或Si氧化物层，利用顶层石墨烯制作纳米器件并构筑纳米电路是一条潜在可行的途径。本课题将通过精确控制生长条件，在金属基底上外延毫米级单层石墨烯薄膜后通过控制插入Si层的厚度并加以氧化，得到理想的绝缘层；然后探索在金属基底上生长的插氧化硅石墨烯薄膜的器件制作工艺并测量其电输运性能；控制石墨烯与所插Si层的界面特性，研究金属基底上graphene-Si异质结构在垂直方向的输运特性；最后直接在石墨烯/氧化硅/金属体系原位加工各种半导体器件，将其组合在一起共同构成简单逻辑器件（如与门、非门等）甚至纳米电路，探索外延生长石墨烯后直接构筑纳米电路的技术途径。

无需转移，直接在金属单晶基底（薄膜）上外延高质量、大面积石墨烯，并在石墨烯与金属基底（薄膜）界面处插入半导体Si层或Si氧化物层，进而利用石墨烯制作纳米器件对于石墨烯在半导体工业的应用具有重要意义。针对石墨烯插层的关键科学问题，本课题开展了基于金属（金属单晶、薄膜）外延生长的石墨烯插层的可控制备、表征，纳电子器件制作以及输运性质的研究，并对器件制作工艺（如绝缘层、顶栅制作、金属电极等）进行深入探索和研究，在外延生长石墨烯薄膜上原位制作了纳电子器件（无转移），取得了以下结果：1）掌握了控制石墨烯与所插Si层或SiOx界面均匀性及厚度的工艺，获得了满足半导体器件应用的均匀可靠的SiOx绝缘层；2）掌握了利用微加工手段在金属单晶基底、薄膜上外延生长的graphene/SiOx异质薄膜上原位制作霍尔器件、场效应晶体管的工艺；3）利用四探针扫描隧道显微镜测量了这些器件在变温（10-300 K）条件下的输运性质，获得金属上外延生长的石墨烯的迁移率等基本物理参量；4）研究了单晶金属基底、薄膜上Graphene/Si异质结构的肖特基接触特性。.项目实施后共发表SCI论文11篇，其中包括Nano Letters 2篇，Advanced Materials 1篇，Advanced Electronic Materials 1篇，Applied Physics Letters 1篇，ACS Applied Materials & Interfaces 1篇等。申请国家发明专利3项。

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