Machine-Learning-Driven Synthesis Methodologies for Analog and RF Integrated Circuits in Advanced Nanometer Technologies

先进纳米技术中模拟和射频集成电路的机器学习驱动合成方法

• 批准号: RGPIN-2019-04130
• 负责人: Zhang, Lihong
• 金额: $ 2.84万
• 依托单位: Memorial University of Newfoundland
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2022
• 资助国家: 加拿大
• 起止时间: 2022-01-01 至 2023-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=752836
• 关键词: Machine; Learning; Driven; Synthesis; Methodologies

As the conventional planar CMOS technology scales down to 22nm and below, maintaining ideal transistor characteristics becomes increasingly challenging. For this reason, nonplanar field-effect transistors (FETs) have been regarded as effective substitutes for ultimate scaling. Due to physical complexity of the nonplanar FET structure in advanced nanometer technologies, transistor performance is strongly affected by associated parasitics, layout dependent effects (LDEs), and lithographic imperfection. To maintain signal integrity, these issues have to be seriously considered in the synthesis of analog/RF integrated circuits (ICs). In this research program, the fascinating advancement of artificial intelligence will be leveraged to promote electronic design automation (EDA) of analog/RF ICs. A complete set of synthesis methodologies and computer-aided design tools will be studied to strengthen the link between performance optimization and physical effects. An innovative machine-learning-driven circuit topology synthesis methodology will be developed. It can emulate expert human designers to apply the knowledge extracted from the given training data to effectively generate proper circuit topologies through inference. Moreover, a novel parasitic/LDE/lithography-aware circuit-sizing methodology will be studied; this methodology would consist of a quick approximate optimization stage followed by a simulation-based refined sizing process. Parasitics, LDEs, and lithographic effects in the advanced nonplanar nanometer technologies will be integrated into MOSFET modeling, which can be included into the topology synthesis and circuit sizing for proactive consideration of layout impact. Furthermore, to fill the vacuum of similar commercial tools in the EDA market, we will continue to explore automated analog/RF layout migration strategies to address parasitics, LDEs, and lithography-related constraints in the nonplanar nanometer technologies. Due to their high sensitivity to complicated analog effects, analog/RF ICs have been recognized as the design bottleneck for promptly pushing mixed-signal system-on-chip products to market. Systematic countermeasures in the layout-aware comprehensive synthesis of analog/RF ICs have not yet been addressed worldwide. With enormous potential for commercialization, this proposed research program addresses the increasingly challenging parasitics, LDEs, and lithographic issues in the nonplanar nanometer technologies; these issues cannot be ignored for analog/RF IC synthesis especially under the shrinking design window and pressing process variation. This program will train over half a dozen next-generation highly qualified personnel (HQP) on advanced EDA in upgraded nanometer technologies. It will benefit the analog/RF design community through significant improvements in design productivity and reliability, which can enhance Canada's competitive advantage in this field.

随着常规平面CMOS技术的扩展到22nm及以下，保持理想的晶体管特征变得越来越具有挑战性。因此，非平面场效应晶体管（FET）被认为是最终缩放的有效替代品。由于高级纳米技术中非平面FET结构的身体复杂性，晶体管性能受到相关的寄生虫，布局依赖效应（LDES）和光刻缺陷的强烈影响。为了维持信号完整性，必须在合成模拟/RF综合电路（ICS）中认真考虑这些问题。在该研究计划中，将利用人工智能的引人入胜的进步来促进模拟/RF IC的电子设计自动化（EDA）。将研究一组完整的合成方法和计算机辅助设计工具，以加强性能优化和物理效果之间的联系。将开发一种创新的机器学习驱动电路拓扑合成方法。它可以模仿专家设计师，以应用从给定的培训数据中提取的知识，以通过推理有效地产生适当的电路拓扑。此外，将研究一种新型的寄生/LDE/光刻 - 感知电路大小的方法。该方法将包括一个快速近似优化阶段，然后是基于仿真的精制尺寸过程。高级非平面纳米技术中的寄生虫，LDE和光刻效应将集成到MOSFET建模中，可以将其包括在拓扑合成和电路尺寸中，以主动考虑布局影响。此外，为了填补EDA市场中类似商业工具的真空，我们将继续探索自动化的模拟/RF布局迁移策略，以解决非平面纳米技术中的寄生虫，LDE和与光刻相关的约束。 由于它们对复杂的模拟效果的敏感性很高，因此，模拟/RF IC被认为是将混合信号的芯片上片上的混合信号推向市场的设计瓶颈。尚未在全球范围内解决模拟/RF IC的综合综合合成中的系统对策。该建议的研究计划具有巨大的商业化潜力，可以解决非平面纳米技术中日益具有挑战性的寄生虫，LDE和光刻问题。对于模拟/RF IC综合，尤其是在缩小的设计窗口和紧迫过程变化下，这些问题不能忽略。该计划将在升级纳米技术中的高级EDA上培训超过六个高素质高素质的人员（HQP）。它将通过显着提高设计生产率和可靠性来使模拟/RF设计社区受益，这可以提高加拿大在这一领域的竞争优势。