High Performance Deep Scaled CMOS Transceivers

高性能深度扩展 CMOS 收发器

• 批准号: RGPIN-2016-06238
• 负责人: Mason, Ralph
• 金额: $ 2.08万
• 依托单位: Carleton University
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2018
• 资助国家: 加拿大
• 起止时间: 2018-01-01 至 2019-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=658971
• 关键词: Performance; Deep; Scaled; CMOS; Transceivers; Performance; Deep; Scaled; CMOS; Transceivers

The objective of this research is to advance the art of monolithic radio circuits. The author has produced circuits now in industrial production for narrow band communications. As well, he is working on broadband phased array wireless communications circuits and All Digital Phase-Lock Loop Circuits (ADPLLs) that can be used for both wireless and local area networking in computer systems. This includes the complete RF and analog radio subsystem, with work on front-end, frequency synthesis and analog/digital conversion circuits. By integrating efforts in all three areas, he can make proper tradeoffs and exploit synergies between system components.***The main focus of this effort is directed at getting high performance from low-cost deep scaled CMOS technologies with transistor channel lengths well below 100nm. Two novel technologies being developed are low power/phase noise injection locked oscillators and low jitter/high linearity subsampling circuits that can be used for receiving data and as part of a subsampling synthesizer. Most recently, these technologies have been integrated as part of millimeter wave phased array architecture and as part of an Injection Locked Rotary Travelling Wave Oscillator which provide superior performance with low power consumption. In particular, the state of the art phase noise performance of these implementations addresses one of the key limitations of high data rate wireless systems. The significance of this work will be the ability to produce low cost highly integrated CMOS transceivers with data rates capabilities to support the most demanding applications such as streaming video and gigabit wireless data networks.***One of the critical aspects of this work will be developing high frequency low phase oscillators and synthesizers which are typically the limiting factor in wireless transceivers using higher order modulation signals. Also critical is the ability to implement these circuits in deep scaled CMOS technologies and distribute their signals throughout an IC without degrading performance or greatly increasing power consumption. The author is encouraged by early results and would note that this technology has broader applications in radar systems, on-chip clock distribution networks and high performance SERDES circuits.**

这项研究的目的是推进整体无线电电路的艺术。作者现在为狭窄的乐队通信制作了工业生产中的电路。同样，他正在研究宽带段阵列无线通信电路以及所有可用于计算机系统中无线和局部网络的数字相锁环路（ADPLL）。这包括完整的RF和模拟无线电子系统，并具有前端，频率合成和模拟/数字转换电路的工作。通过整合所有三个领域的努力，他可以做出适当的权衡并利用系统组件之间的协同作用。 开发的两种新型技术是低功率/相噪声注射锁定振荡器和低抖动/高线性亚采样电路，可用于接收数据，也可以作为亚次采样合成器的一部分。 最近，这些技术已被整合为毫米波杆阵列架构的一部分，也是注射锁定的旋转波动波振荡器的一部分，该旋转波动波振荡器可提供低功耗的性能。 特别是，这些实现的最先进的相位噪声性能解决了高数据速率无线系统的关键局限性之一。 这项工作的重要性将是能够生产具有数据速率功能的低成本CMO收发器，以支持最苛刻的应用程序，例如流媒体视频和千兆无线数据网络。***这项工作的关键方面之一将开发高频低相位示波器和通常是使用无用级别模型的有限级因素的高频振荡器和合成器。 同样至关重要的是能够在深度缩放的CMOS技术中实施这些电路并在整个IC中分发信号而不会降低性能或大大增加功耗。提交早期结果鼓励作者，并会注意到，该技术在雷达系统，芯片时钟分配网络和高性能Serdes Circuits中具有更广泛的应用。**