New Architectures and CAD Algorithms for Field-Programmable Logic Fabrics

适用于现场可编程逻辑结构的新架构和 CAD 算法

• 批准号: 194238-2012
• 负责人: Wilton, Steven
• 金额: $ 3.06万
• 依托单位: University of British Columbia
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2015
• 资助国家: 加拿大
• 起止时间: 2015-01-01 至 2016-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=569753
• 关键词: New; Architectures; CAD; Algorithms; Field

A Field-Programmable Gate Array (FPGA) is an integrated circuit that can be programmed to implement virtually any digital circuit. FPGA's are widely used in applications such as telecommunications, bioinformatics, visualization systems, and signal processing. An FPGA's programmability provides users the ability to implement large, complex circuits without requiring access to an expensive state-of-the-art chip manufacturing plant, an expense that is out-of-reach for most small and medium-sized electronics companies. The costs of manufacturing integrated circuits is growing so dramatically that, in the near future, only the large processor, graphics engine, system-on-chip and FPGA companies will be able to build leading-edge devices. For everyone else, programmable logic will provide the only option for building an integrated circuit using leading-edge processes. This will lead to the era of ubiquitous programmable logic, where generic programmable logic devices will be the substrate upon which virtually all applications are built. This research described in this proposal seeks new architectures, CAD algorithms, and design techniques that will make these large ubiquitous programmable devices viable. Straightforward scaling of current FPGA techniques to larger chips will not suffice, primarily due to design complexity and designer productivity issues. Specifically, this research focuses on three subprojects, each of which addresses designer productivity: (1) the design of FPGA architectures that are more amenable to fast CAD tools, (2) the integration of debugging circuitry into an FPGA device, and (3) a methodology for the rapid design and optimization of very large reconfigurable fabrics. Together, these subprojects will significantly improve the productivity both of designers using programmable devices, and of the developers of the programmable devices themselves. As a result, the benefits of programmability will be available to a much broader design community than ever before.

现场可编程的门阵列（FPGA）是一个集成电路，可以编程以实现几乎任何数字电路。 FPGA广泛用于电信，生物信息学，可视化系统和信号处理等应用。 FPGA的可编程性使用户能够实施大型，复杂的电路，而无需访问昂贵的最先进的芯片制造工厂，这是大多数中小型电子公司的范围内的费用。 制造综合电路的成本正在如此巨大，以至于在不久的将来，只有大型处理器，图形引擎，芯片系统和FPGA公司将能够构建前沿设备。 对于其他所有人来说，可编程逻辑将为使用前沿过程构建集成电路的唯一选择。 这将导致无处不在的可编程逻辑时代，在该逻辑中，通用可编程逻辑设备将是几乎所有应用程序构建的基板。 该提案中描述的这项研究寻求新的体系结构，CAD算法和设计技术，这些技术将使这些庞大的无处不在的可编程设备可行。 当前FPGA技术对较大芯片的直接缩放不足，这主要是由于设计复杂性和设计师的生产力问题。 具体而言，这项研究的重点是三个子项目，每个项目都针对设计师的生产率：（1）FPGA体系结构的设计更适合快速CAD工具，（2）将调试电路集成到FPGA设备中，以及（3）一种快速设计和优化非常大的可重构织物的方法。 共同使用可编程设备以及可编程设备本身的开发人员，共同将显着提高设计人员的生产率。 结果，可编程性的好处比以往任何时候都更广泛。