Room-Temperature Single Atom Silicon Quantum Electronics

室温单原子硅量子电子学

基本信息

  • 批准号:
    EP/V030035/1
  • 负责人:
  • 金额:
    $ 70.81万
  • 依托单位:
  • 依托单位国家:
    英国
  • 项目类别:
    Research Grant
  • 财政年份:
    2021
  • 资助国家:
    英国
  • 起止时间:
    2021 至 无数据
  • 项目状态:
    未结题

项目摘要

In recent years, it has become possible to define semiconductor quantum electronic switches in silicon using individual impurity atoms within a semiconductor crystal. This reduces the switching 'core' of an electronic device to the ultimate, atomic scale limit. Furthermore, electronic charge in the discrete, quantum states of the impurity atom may be controlled at the level of individual electrons, also reducing the size of information 'bits' from many thousands to a few, or even single electrons. 'Single-atom quantum dot transistors' (SA-QDTs) such as these hold great promise for a wide range of applications, including ultra-low power highly scaled nanoelectronics, single charge/molecule sensors, metrological standards and quantum computation. Achieving wide-scale, general application of SA-QDTs, e.g. in nanoelectronics or ultra-high sensitivity sensing, requires both room-temperature (RT) operation and large-scale manufacturability. However, at present the potential of these devices has remained unfulfilled, due to problems such as electrical operation at only cryogenic temperatures, the use of materials lacking large scale device manufacturability, or a lack of compatibility with current silicon electronic circuits technology, etc. Recently, we have demonstrated RT operation in silicon SA-QDTs based on phosphorus (P) dopant atoms embedded in ~10 nm scale Si-SiO2-Si point-contacts, fabricated by electron beam lithography. Both single and double, coupled, QD RT operation have now been demonstrated. The fabrication of these devices in silicon is completely compatible with conventional large-scale, Si electronic circuit nanofabrication technology. In complementary work to the above, we have also demonstrated methods to locate impurity atoms at precise atomic scales using advanced scanning probe lithographic (SPL) techniques.The central aim of this project is to develop useful RT SA-QDT devices, circuits and sensors in silicon. In doing this we propose to move from the present level of individual devices to 'proof-of-principle' RT circuits with ~10 devices. We will also develop single-molecule sensors based on SA-QDTs, exploiting the sensitivity of these devices to changes in surface charge at the level of <1e. We propose to build memory cell, logic gate and single-molecule sensor circuits, using both electron-beam and scanning probe lithographic methods. We will also extend our fabrication methods for atomically precise nanofabrication using hydrogen depassivation SPL, to establish structural precision at this scale for the first time in devices operating at RT. Simulation methods, from the individual device to circuit level, will be developed to establish design rules for single-atom electronic systems. Successful completion of this project will realise the potential of single-atom devices for quantum nanoelectronic circuits and single-molecule sensors, opening the way for a future large-scale atomic electronics technology.
近年来,使用半导体晶体内的单个杂质原子在硅中定义半导体量子电子开关已经成为可能。这将电子设备的开关“核心”降低到最终的原子尺度极限。此外,杂质原子的离散量子态中的电子电荷可以控制在单个电子的水平,也将信息“位”的大小从数千个减少到几个甚至单个电子。诸如此类的“单原子量子点晶体管”(SA-QDT)在广泛的应用中具有广阔的前景,包括超低功耗、大规模纳米电子学、单电荷/分子传感器、计量标准和量子计算。实现 SA-QDT 的广泛、普遍应用,例如在纳米电子学或超高灵敏度传感中,需要室温(RT)操作和大规模可制造性。然而,由于诸如只能在低温下进行电操作、使用缺乏大规模器件可制造性的材料或与当前硅电子电路技术缺乏兼容性等问题,目前这些器件的潜力仍未得到发挥。 ,我们展示了硅 SA-QDT 中的 RT 操作,该硅 SA-QDT 基于嵌入约 10 nm 级 Si-SiO2-Si 点接触中的磷 (P) 掺杂剂原子,通过电子束光刻制造。单、双、耦合、QD RT 操作现已得到演示。这些硅器件的制造与传统的大规模硅电子电路纳米制造技术完全兼容。在对上述工作的补充中,我们还演示了使用先进的扫描探针光刻 (SPL) 技术在精确原子尺度上定位杂质原子的方法。该项目的中心目标是开发有用的 RT SA-QDT 器件、电路和传感器。硅。为此,我们建议从目前的单个设备水平转向具有约 10 个设备的“原理验证”RT 电路。我们还将开发基于 SA-QDT 的单分子传感器,利用这些器件对 <1e 水平的表面电荷变化的敏感性。我们建议使用电子束和扫描探针光刻方法来构建存储单元、逻辑门和单分子传感器电路。我们还将使用氢去钝化 SPL 扩展我们的原子级精确纳米制造方法,以首次在室温下运行的设备中建立这种规模的结构精度。将开发从单个器件到电路级的仿真方法,以建立单原子电子系统的设计规则。该项目的成功完成将实现单原子器件在量子纳米电子电路和单分子传感器方面的潜力,为未来大规模原子电子技术开辟道路。

项目成果

期刊论文数量(7)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Dark-field optical fault inspection of ~10 nm scale room-temperature silicon single-electron transistors
~10 nm 级室温硅单电子晶体管的暗场光学故障检查
  • DOI:
    10.1088/1361-6528/acfb10
  • 发表时间:
    2023
  • 期刊:
  • 影响因子:
    3.5
  • 作者:
    He W
  • 通讯作者:
    He W
Quantum Szilard cycle and information-entropy exchange in a room-temperature dopant atom double quantum dot transistor
室温掺杂原子双量子点晶体管中的量子西拉德循环和信息熵交换
  • DOI:
  • 发表时间:
    2022
  • 期刊:
  • 影响因子:
    0
  • 作者:
    F. Abualnaja
  • 通讯作者:
    F. Abualnaja
Room temperature Szilard cycle and entropy exchange at the Landauer limit in a dopant atom double quantum dot silicon transistor
  • DOI:
    10.1088/1361-6463/ac66a8
  • 发表时间:
    2022-04
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Z. Durrani;Faris Abualnaja;Mervyn E. Jones
  • 通讯作者:
    Z. Durrani;Faris Abualnaja;Mervyn E. Jones
Single particle entropy stability and the temperature-entropy diagram in quantum dot transistors
  • DOI:
    10.1103/physrevresearch.5.033025
  • 发表时间:
    2023-07
  • 期刊:
  • 影响因子:
    4.2
  • 作者:
    Faris Abualnaja;W. He;A. Andreev;Mervyn Jones;Z. Durrani
  • 通讯作者:
    Faris Abualnaja;W. He;A. Andreev;Mervyn Jones;Z. Durrani
Device fabrication for investigating Maxwell's Demon at room-temperature using double quantum dot transistors in silicon
  • DOI:
    10.1016/j.mne.2022.100114
  • 发表时间:
    2022-02-28
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Abualnaja, Faris;He, Wenkun;Durrani, Zahid
  • 通讯作者:
    Durrani, Zahid
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Zahid Durrani其他文献

Zahid Durrani的其他文献

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  • 资助金额:
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  • 项目类别:
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