Autonomous NAnotech GRAph Memory (ANAGRAM)

自主纳米技术图形存储器 (ANAGRAM)

基本信息

批准号：
EP/V008242/1
负责人：
Alexantrou Serb
金额：
$ 44.25万
依托单位：
University of Southampton
依托单位国家：
英国
项目类别：
Research Grant
财政年份：
2021
资助国家：
英国
起止时间：
2021 至无数据
项目状态：
已结题

来源：
https://gtr.ukri.org/projects?ref=EP%2FV008242%2F1
关键词：
Autonomous NAnotech GRAph Memory ANAGRAM

项目摘要

Artificial intelligence (AI) is transforming our societies, but the more it proliferates, the higher the customer demands for functionality and efficiency (most notably energy). Thus, as time progresses the limitations of statistical learning-based AI that has underpinned most AI work so far are beginning to naturally become more exposed. Tasks such as variable binding and manipulation, inductive reasoning and 1-shot learning, at which statistical learning is not as strong, suggest solutions in the sphere of abstract symbol processing AI. The commonly referenced 'next wave of AI' that is capable of such exploits (towards "strong AI") is likely to make extensive use of symbol processing capabilities and simultaneously demand a bespoke set of hardware solutions. The proposed project primarily addresses the issue of developing general-purpose (platform-level) hardware for precisely symbolic AI.The proposed project seeks to develop a memory module that features: a) an internal structure and b) in-memory computing capabilities that render it particularly suitable for symbolic processing-based artificial intelligence (AI) systems. Ultimately the project seeks to deliver: 1) Two microchip iterations prototyping the memory system. 2) A software environment (infrastructure) for easy programming and operation of the resulting microchips (includes simulation capabilities for proof-of-concept tests). 3) A demonstration of the memory cell operating together with a symbolic processor as an aggregate system. 4) A functioning set of starter applications illustrating the capabilities of the design.The overall effort is driven by a philosophy of co-optimising the memory across the entire trio of fundamental device components, symbolic AI mechanics and hardware design facets. Specifically: functionality in the proposed memory system will be pursued by: a) Designing a resistive RAM-based (ReRAM) memory unit where operation of the ReRAM devices and ReRAM tech specifications themselves are subservient to the specific operational goals of the memory system. b) Adapting the mathematical machinery of the system in order to map functional operations to hardware-friendly machine-code level operations: the stress is on hardware-friendliness, not mathematical elegance. This will be inextricably linked to the design of the memory's instruction set. c) Designing an architecture that runs the symbolic memory efficiently by using memory allocation techniques that maximise locality and making extensive use of power-gating. Simultaneously, implementation of a solid software stack infrastructure will enable efficient and fast prototyping and hypothesis testing.The cornerstone of the targeted project impact is to lay the foundations for launching an industrial-scale design effort towards hardware for symbolic AI. Hence the bulk of the effort is in chip design (prototype-based de-risking of the idea) and toolchain development (impact acceleration by lowering barriers to user uptake). Simultaneously, it is expected that the project will play a significant role in enhancing interest in symbol-level AI and very crucially, inducing interest in connecting symbolic AI with statistical learning one; thereby significant impact on knowledge is achieved. Finally, the increased in the capabilities of AI, as well as the transparency of decision-making (typically readily expressible via formal expressions or even in pseudo-natural language) offered by the symbolic approach promise to make a significant impact in enhancing acceptance of AI by society, providing a solid scientific foundation for certification processes (AI trust - broadening the scope of applications that accept an AI solution). With hardware available for this task, significant impact on productivity and quality of life is to be achieved.The project is self-contained and is designed to launch a much broader, sustainable effort, headed by the PI in this field.

人工智能 (AI) 正在改变我们的社会，但它扩散得越多，客户对功能和效率（尤其是能源）的要求就越高。因此，随着时间的推移，迄今为止支撑大多数人工智能工作的基于统计学习的人工智能的局限性开始自然地变得更加暴露。诸如变量绑定和操作、归纳推理和单次学习等统计学习能力不强的任务，在抽象符号处理人工智能领域提出了解决方案。通常提到的能够实现此类利用（迈向“强人工智能”）的“下一波人工智能”可能会广泛利用符号处理功能，同时需要一套定制的硬件解决方案。拟议项目主要解决为精确符号人工智能开发通用（平台级）硬件的问题。拟议项目旨在开发一种内存模块，其特点是：a）内部结构和b）内存计算能力，可渲染它特别适合基于符号处理的人工智能（AI）系统。该项目最终力求实现：1) 两次微芯片迭代，构建存储系统原型。 2) 用于轻松编程和操作所得微芯片的软件环境（基础设施）（包括用于概念验证测试的模拟功能）。 3) 存储单元与符号处理器一起作为聚合系统运行的演示。 4) 一组功能齐全的入门应用程序，展示了设计的功能。总体工作是由在整个基本设备组件、符号 AI 机制和硬件设计方面共同优化内存的理念驱动的。具体来说：所提出的存储系统中的功能将通过以下方式实现：a) 设计基于电阻 RAM (ReRAM) 的存储单元，其中 ReRAM 设备的操作和 ReRAM 技术规范本身服从存储系统的特定操作目标。 b) 调整系统的数学机制，以便将功能操作映射到硬件友好的机器代码级操作：重点是硬件友好性，而不是数学优雅。这将与存储器指令集的设计密不可分。 c) 设计一种架构，通过使用最大化局部性的内存分配技术并广泛使用电源门控来有效地运行符号内存。同时，实施可靠的软件堆栈基础设施将实现高效、快速的原型设计和假设测试。目标项目影响的基石是为启动符号人工智能硬件的工业规模设计工作奠定基础。因此，大部分工作都集中在芯片设计（基于原型的想法去风险）和工具链开发（通过降低用户采用障碍来加速影响）。同时，预计该项目将在提高人们对符号级人工智能的兴趣方面发挥重要作用，最重要的是，激发人们将符号人工智能与统计学习联系起来的兴趣；从而对知识产生重大影响。最后，符号方法提供的人工智能能力的增强以及决策的透明度（通常可以通过正式表达甚至伪自然语言轻松表达）有望对提高人工智能的接受度产生重大影响社会的认可，为认证过程提供坚实的科学基础（人工智能信任——扩大接受人工智能解决方案的应用范围）。有了可用于此任务的硬件，将对生产力和生活质量产生重大影响。该项目是独立的，旨在发起由该领域的 PI 领导的更广泛、可持续的努力。