Study on Singl-Transistor-Cell-Type Ferroelectric Memory

单晶体管单元型铁电存储器的研究

基本信息

批准号：
09305025
负责人：
ISHIWARA Hiroshi
金额：
$ 21.89万
依托单位：
Tokyo Institute of Technology
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (A)
财政年份：
1997
资助国家：
日本
起止时间：
1997 至 1999
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-09305025/
关键词：
Ferroelectric Memory SOI Silicon YMnO_3 SrBi_2Ta_2O_9 強誘電体メモリ MFSFET PbZr_<1-x>Ti_xO_3 Si

项目摘要

In this year, it was first pointed out that a simple MFSFET (metal-ferroelectric-semiconductor field effect transistor) structure was not suitable to keep a long retention time of the memory. Thus, it was recommended to insert a buffer layer between the ferroelectric film and Si substrate. As a candidate of the buffer layer, Y_2O_3 was used and PLZT ( (Pb, La)(Zr, Ti) O_3) was formed on it. The reasons why we chose PLZT are as follows : (1) PLZT can be formed at relatively low temperature so that the Y_2O_3 buffer does not degrade during the thermal process to fcrm PLZT, and (2) the remnant polarization of PLZT is lower than that of PZT.As a result, good C-V characteristic of Pt/PLZT/Pt/Y_2O_3/Si diodes were obtained when the area of the MFM part composed of Pt/PLZT/Pt structure was reducted to 1/15 of the area of the MIS (Pt/ Y_2O_3/Si) part.Next, a doucble-layer of SrTa_2O_6 and SiON was used as the buffer layer to deposit SBT (SrBi_2Ta_2O_9). where SiON was used to prevent the oxidation of Si surface. The device structure of MFMIS-FET's was so designed that the operation voltage became low. Under the optimum conditions where the area ratio largr than 10 was adopted, the current on-off ratio larger than 10^3 was retained for more than 10 hours at low operation voltage of 3.5V.It is concluded from these results that the optimization of the area ratio is most important in obtaining good retention characteristic.Finally, formation of SBT films was conducted using liquid-deliver MOCVD method, in which Bi(C_6H_5)_3 and Sr[Ta(OC_2H_5)_6]_2 were used. It was found that nearly stoichiometric films were formed at lower temperature than 400℃, and ferroelectricity was observed.

今年，有人首次指出简单的MFSFET（金属-铁电-半导体场效应晶体管）结构不适合保持存储器的较长保留时间，因此建议在铁电体之间插入缓冲层。使用Y_2O_3作为缓冲层的候选材料，并在其上形成PLZT（（Pb，La）（Zr，Ti）O_3）。 PLZT的优点如下：（1）PLZT可以在相对较低的温度下形成，使得Y_2O_3缓冲剂在形成PLZT的热处理过程中不会降解；（2）PLZT的剩余极化低于PZT。结果，当MFM部分的面积由以下组成时，Pt/PLZT/Pt/Y_2O_3/Si二极管获得了良好的C-V特性Pt/PLZT/Pt结构缩小到MIS（Pt/Y_2O_3/Si）部分面积的1/15。接下来，使用SrTa_2O_6和SiON双层作为缓冲层沉积SBT（SrBi_2Ta_2O_9）），其中SiON用于防止Si表面氧化，MFMIS-FET的器件结构就是这样。设计工作电压变低，在采用面积比大于10的最佳条件下，在3.5V的低工作电压下，大于10^3的电流通断比保持10小时以上。从这些结果得出结论，面积比的优化对于获得良好的保持特性至关重要。最后，采用液体输送MOCVD方法进行SBT薄膜的形成，其中Bi(C_6H_5)_3和使用Sr[Ta(OC_2H_5)_6]_2，发现在低于400℃的温度下形成接近化学计量的薄膜，并观察到铁电性。