Energy Optimization for Asynchronous Circuits using Freedom of Execution Speed

使用执行速度自由度的异步电路能量优化

• 批准号: 21700062
• 负责人: SAITO Hiroshi
• 金额: $ 2.5万
• 依托单位: The University of Aizu
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Young Scientists (B)
• 财政年份: 2009
• 资助国家: 日本
• 起止时间: 2009 至 2011
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-21700062/
• 关键词: 非同期式回路; 低消費エネルギー; 動作合成; プロセッサ; 低消費エネルギ; マイクロプロセッサ

In this research, we optimize asynchronous circuits in terms of energy consumption using freedom of execution speed. Different from synchronous circuits where execution timing of all operations is decided by a global clock signal, execution timing of each operation in asynchronous circuits can be decided freely. Using this freedom, energy optimization is carried out. The result of this research is classified into two sub result. The first is for specific circuits and the second is for processor. For specific circuits, we proposed an energy optimization method. For given behavioral description of an application, latency constraint, and resource library, the proposed method calculates slack for each operation defined for the start time during behavioral synthesis. Then, slow circuits are allocated to operations which have slack. For processor, we designed an asynchronous AVR processor aimed for FPGA and ASIC implementations. Also, for energy optimization, we proposed area optimization and performance optimization methods. Comparing to synchronous AVR processor, the energy consumption of our asynchronous AVR processor was half of the synchronous one.

在这项研究中，我们使用执行速度在能源消耗方面优化异步电路。不同于同步电路所有操作的执行时间由全局时钟信号决定，可以自由地确定每个操作的执行时间。使用这种自由，进行了能量优化。这项研究的结果分为两个子结果。第一个是针对特定电路，第二个是处理器。对于特定电路，我们提出了一种能量优化方法。对于给定的应用程序，延迟约束和资源库的行为描述，提出的方法计算行为合成过程中开始时间定义的每个操作的松弛。然后，慢速电路分配给具有松弛的操作。对于处理器，我们设计了一个异步AVR处理器，旨在FPGA和ASIC实现。同样，为了优化能量，我们提出了区域优化和性能优化方法。与同步AVR处理器相比，异步AVR处理器的能量消耗是同步的一半。

项目成果

非同期式AVRプロセッサの設計

异步AVR处理器设计

• 发表时间: 2011
• 作者: 六車英峰;辻田祐一;熊谷諒平
• 通讯作者: 熊谷諒平