Novel Insulated Gate Structure having Ultrathin Si Quantum Well for Realization of InP-Based Ultra High-Frequency and High-Power Devices

新型超薄硅量子阱绝缘栅结构实现InP基超高频大功率器件

基本信息

批准号：
10555098
负责人：
HASEGAWA Hideki
金额：
$ 8.26万
依托单位：
Hokkaido University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
1998
资助国家：
日本
起止时间：
1998 至 1999
项目状态：
已结题

项目摘要

The purpose of this study is to provide a breakthrough for realization of InP-based ultra high-frequency and high-speed devices using a novel insulated gate structure having a "ultrathin Si quantum well". The main results obtained are listed below:l ) Novel in-situ characterization methods for semiconductor free surfaces as well as MIS interfaces during the interface formation process were established based on a UHV-based contactless C-V method and a photoluminescence surface state spectroscopy (PLSィイD13ィエD1).2) By combining these methods with a UHV-STM/STS and a XPS analyses, the pinning center was found not to be a point with discrete deep level, but to be an area with gap state continuum. This seems to support the unified disorder induced gap state (DIGS) model for Fermi level pinning proposed by our group, which is the basis of the concept of present "insulated-gate structure having ultrathin Si quantum well".3) The insulated-gate structure having ultrathin Si quantum well with precisely controlled quantum well thickness was successfully realized by MBE growth of ultrathin psedomorphic Si layer on the InP-based materials and subsequent thinning of the Si layer by ECR plasma-induced partial nitridation.4) Under the optimum ECR nitridation condition, this process realized the InP MIS structure with extremely low interface state density of 2x10ィイD110ィエD1cmィイD1-2ィエD1eVィイD1-1ィエD1. This value is the best of all the oxide-free InP MIS structures reported so far.5) An InP MISFETs fabricated using the present insulated gate structure having the ultrathin Si quantum well exhibited excellent gate control capability, high effective electron mobility and stable operation. The drift of the drain current was found to be as small as 1.9% after 10ィイD14ィエD1 s operation.

本研究的目的是为利用具有“超薄硅量子阱”的新型绝缘栅结构实现InP基超高频高速器件提供突破，主要成果如下：l)。基于特高压非接触C-V方法和光致发光表面态光谱，建立了界面形成过程中半导体自由表面和MIS界面的新型原位表征方法(PLS D13 D1).2) 通过将这些方法与 UHV-STM/STS 和 XPS 分析相结合，发现钉扎中心不是具有离散深能级的点，而是具有间隙态连续体的区域。似乎支持我们小组提出的费米能级钉扎的统一无序诱导间隙态（DIGS）模型，该模型是当前“具有超薄硅量子阱的绝缘栅结构”概念的基础。3）通过在InP基材料上MBE生长超薄假晶硅层并随后通过ECR等离子体诱导部分氮化减薄硅层，成功实现了具有精确控制量子阱厚度的超薄硅量子阱的绝缘栅结构。4)在最佳ECR氮化条件下，该工艺实现了界面态密度极低的InP MIS结构2x10D110D1cmD1-2D1eVD1-1D1，该值是迄今为止报道的所有无氧化物InP MIS结构中最好的。5)使用具有超薄Si量子阱的绝缘栅结构制造的InP MISFET表现出优异的栅极控制能力、高效率。发现电子迁移率和稳定工作的漂移小至运行10d14d1s后为1.9%。