STUDY OF ULTRA-HIGH-SPEED CMOS USING FULLY SELF-ALIGNED METALLIZATION

使用完全自对准金属化的超高速 CMOS 研究

基本信息

批准号：
08455157
负责人：
YOKOYAMA Michio
金额：
$ 4.54万
依托单位：
TOHOKU UNIVERSITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
1996
资助国家：
日本
起止时间：
1996 至 1998
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-08455157/
关键词：
Self-Aligned Process Metallization Selective Al-CVD Parasitic resistances Silicide Self-aligned barrier layer RF-CMOS GHz CMOS amplifier 選択AlCVD TiNバリア MOSFET プラズマ窒化選択Al-CVD

项目摘要

In sub-0.1um MOSFETs, interconnect parasitics are drastically limiting the performance improvement. MOSFETs with wide gate width are essentially required for an application to high current-drivability devices such as word-line drivers, gate array devices and analog RF devices. In this work, in order to reduce the parasitic resistances, fully-self-aligned-metallization (FSAM) MOSFET using conventional salicide and selective Al-CVD techniques are proposed and investigated.FSAM technology features ; (1) low contact resistivity of TiSi_2/Si, (2) self-aligned barrier layer formed by plasma nitridation of TiSi_2 surface, and (3) low sheet resistance of CVD-Al layer. At first, we have developed a self-aligned barrier layer formation method using N2 plasma nitridation of conventional silicided surface. It is confirmed that the 10-nm nitrided barrier layer is Ti-Si-N ternary amorphous layer. Furthermore, it is found that the Ti-Si-N layer acts as a diffusion barrier even after the 450ﾟC thermal treatment.On the self-aligned barrier layer, aluminum films are successfully deposited in the same process chamber without breaking the vacuum. It is found that the aluminum films are selectively deposited on the conductive barrier layer.For an application to analog RF-CMOS, high-frequency performance of wide-gate FSAM MOSFETs has been evaluated using RF simulation. Simulation results have shown that a transition frequency f_T of FSAM devices increases even below 0.2um gate length, while that of conventional silicide devices decrease with shrinkage of gate length down to 0.2um because of high parasitic resistances.Furthermore, circuit design of RF-CMOS power amplifier for mobile phone has been investigated, and GHz-band high-efficiency CMOS push-pull amplifier has been proposed.

在Sub-0.1UM MOSFET中，互连寄生虫极大地限制了性能的改善。具有宽门宽度的MOSFET对于应用于高电流驱动性设备（例如文字线驱动程序，门阵列设备和模拟RF设备）本质上是必需的。在这项工作中，提出和研究了这项工作，以减少使用常规盐盐和选择性的Al-CVD技术的寄生抗性，完全一致的金属化（FSAM）MOSFET。（1）TISI_2/Si的低接触电阻，（2）由Tisi_2表面的血浆硝化形成的自对准屏障层，以及（3）CVD-AL层的低板电阻。首先，我们使用常规硅化表面的N2血浆硝化化开发了一种自对准的屏障层形成方法。证实10 nm的硝基屏障层是Ti-Si-N三元无定形层。此外，发现即使在450°C热处理后，Ti-Si-n层也充当扩散屏障。在自对准的屏障层中，铝制膜在同一过程室中成功沉积而不会破坏真空。发现铝制膜被选择沉积在导电屏障层上。对于Analog RF-CMOS的应用，已使用RF模拟评估了宽门栅FSAM MOSFET的高频性能。 Simulation results have shown that a transition frequency f_T of FSAM devices increase even below 0.2um gate length, while that of conventional silicone devices decrease with shrinkage of gate length down to 0.2um because of high parasitic resistances.Furthermore, circuit design of RF-CMOS power amplifier for mobile phone has been investigated, and GHz-band high-efficiency CMOS push-pull amplifier has been proposed.