STUDY OF ULTRA-HIGH-SPEED CMOS USING FULLY SELF-ALIGNED METALLIZATION

使用完全自对准金属化的超高速 CMOS 研究

基本信息

批准号：
08455157
负责人：
YOKOYAMA Michio
金额：
$ 4.54万
依托单位：
TOHOKU UNIVERSITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B)
财政年份：
1996
资助国家：
日本
起止时间：
1996 至 1998
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-08455157/
关键词：
Self-Aligned Process Metallization Selective Al-CVD Parasitic resistances Silicide Self-aligned barrier layer RF-CMOS GHz CMOS amplifier 選択AlCVD TiNバリア MOSFET プラズマ窒化選択Al-CVD

项目摘要

In sub-0.1um MOSFETs, interconnect parasitics are drastically limiting the performance improvement. MOSFETs with wide gate width are essentially required for an application to high current-drivability devices such as word-line drivers, gate array devices and analog RF devices. In this work, in order to reduce the parasitic resistances, fully-self-aligned-metallization (FSAM) MOSFET using conventional salicide and selective Al-CVD techniques are proposed and investigated.FSAM technology features ; (1) low contact resistivity of TiSi_2/Si, (2) self-aligned barrier layer formed by plasma nitridation of TiSi_2 surface, and (3) low sheet resistance of CVD-Al layer. At first, we have developed a self-aligned barrier layer formation method using N2 plasma nitridation of conventional silicided surface. It is confirmed that the 10-nm nitrided barrier layer is Ti-Si-N ternary amorphous layer. Furthermore, it is found that the Ti-Si-N layer acts as a diffusion barrier even after the 450ﾟC thermal treatment.On the self-aligned barrier layer, aluminum films are successfully deposited in the same process chamber without breaking the vacuum. It is found that the aluminum films are selectively deposited on the conductive barrier layer.For an application to analog RF-CMOS, high-frequency performance of wide-gate FSAM MOSFETs has been evaluated using RF simulation. Simulation results have shown that a transition frequency f_T of FSAM devices increases even below 0.2um gate length, while that of conventional silicide devices decrease with shrinkage of gate length down to 0.2um because of high parasitic resistances.Furthermore, circuit design of RF-CMOS power amplifier for mobile phone has been investigated, and GHz-band high-efficiency CMOS push-pull amplifier has been proposed.

在低于 0.1um 的 MOSFET 中，互连寄生现象极大地限制了性能的提高，而高电流驱动能力器件（例如字线驱动器、门阵列器件和模拟 RF 器件）的应用本质上需要具有宽栅极宽度的 MOSFET。为了降低寄生电阻，提出并研究了使用自对准硅化物和选择性传统 Al-CVD 技术的全自对准金属化 (FSAM) MOSFET。FSAM 技术特点； TiSi_2/Si的低接触电阻率，（2）TiSi_2表面等离子体氮化形成的自对准阻挡层，以及（3）CVD-Al层的低薄层电阻首先，我们开发了一种自对准阻挡层形成方法。采用N2等离子体氮化方法对常规硅化物表面进行氮化，证实10nm氮化阻挡层为Ti-Si-N三元非晶层。即使在 450°C 热处理后，Ti-Si-N 层仍可充当扩散阻挡层。在自对准阻挡层上，在同一工艺室中成功沉积铝膜，而无需破坏真空。选择性地沉积在导电阻挡层上。对于模拟 RF-CMOS 的应用，已使用 RF 仿真评估了宽栅极 FSAM MOSFET 的高频性能，仿真结果表明，过渡频率 f_T 为FSAM器件甚至在栅极长度低于0.2um时也会增大，而传统硅化物器件由于寄生电阻较高，随着栅极长度缩小到0.2um，器件的器件尺寸会减小。此外，还研究了手机用RF-CMOS功率放大器的电路设计，并且GHz频段高效CMOS推挽放大器已被提出。