Implementation of a High-Speed Asynchronous Data Transfer VLSI Based on Bidirectional Current-Mode Multiple-Valued Circuit Techniques

基于双向电流模式多值电路技术的高速异步数据传输VLSI的实现

基本信息

批准号：
15500029
负责人：
HANYU Takahiro
金额：
$ 2.43万
依托单位：
Tohoku University
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
2003
资助国家：
日本
起止时间：
2003 至 2005
项目状态：
已结题

项目摘要

The trend in global interconnection delay such as clock distribution is becoming a significant problem in recent deep submicron VLSI. As CMOS technology scales from one generation to the next, the product of the interconnect resistance and load capacitance is not scaling with technology. One of the possible methods to solve the above interconnection problems is to use asynchronous circuit implementation. Dual-rail encoding is widely used as an encoding style of asynchronous data transfer, where every logical variable is encoded using two wires and timing information is also implicit in the code. Every asynchronous data transfer protocol is based on request-acknowledge handshaking : every transfer features a request action where the initiator starts a transfer, and an acknowledge action allowing the target to respond. In this way, the signals propagate round trip between the transmitter and the receiver, thus the cycle time of data transfer becomes large, which is the problem accompanyi … More ng asynchronous data transfer essentially. If the above procedures are executed simultaneously, the cycle time of the asynchronous data transfer with dual-rail encoding becomes much faster than that of the conventional methods. In this research, a new asynchronous data-transfer protocol, called 2-color "1-pbase" dual-rail encoding, is proposed for high-speed asynchronous data transfer. The 2-color 1-phase encoding has two colors which mean two kinds of data definition "ODD" and "EVEN", and different valid data is detected by transferring codewords which have different color alternately. In this protocol, the receiver as well as the transmitter sends the color information as the request signal, then the data transfer is performed by detecting whether the mutual color information is same or not. Because the both request signals can be sent simultaneously, overlap communication can be done. Since data and color information must be bundled on the same wires in the asynchronous data transfer, it is important to detect valid data from the mixed dual-rail code of data and color information. The use of the proposed encoding makes it easy to merge and detect data and color information by calculating the sum of the codewords. In multiple-valued bidirectional current-mode circuits, since current-mode linear summation can be implemented by wiring without any active devices, the proposed asynchronous circuit becomes simple. Moreover, current signals from both sides can be superposed on the same wires, which is an important characteristic of multiple-valued current-mode logic to realize a control signal multiplexing scheme. The use of comparators with sense amplifier makes it easy to detect the sum of components of the codewords quickly. In fact, it is evaluated in a 0.18um CMOS technology that the data transfer cycle of the proposed asynchronous data-transfer scheme using the multiple-valued current-mode logic circuit is about 1.5-times faster than that of the corresponding binary CMOS implementation under the normalized power dissipation. Less

全球互连延迟（如时钟分布）的趋势正在成为最近的深层次级VLSI中的一个重大问题。随着CMOS技术从一代到下一代的扩展，互连电阻和负载电容的产物并不是技术的扩展。解决上述互连问题的可能方法之一是使用异步电路实现。双轨编码被广泛用作异步数据传输的编码样式，其中每个逻辑变量均使用两条线进行编码，并且定时信息也隐含在代码中。每个异步数据传输协议均基于请求acknowledge的握手：每个转移都有一个请求操作，其中启动器开始转移，并且确认措施允许目标响应。通过这种方式，信号在发射器和接收器之间传播往返，因此数据传输的周期时间很大，这是问题的参与…更ng异步数据传输基本上是。如果简单地执行上述过程，则使用双轨编码的异步数据传输的周期时间比常规方法的速度快得多。在这项研究中，为高速异步数据传输提出了一种新的异步数据传输协议，称为2色“ 1-Pbase”双轨编码。 2色1相编码具有两种颜色，这意味着两种数据定义“奇数”和“偶数”，并且通过传输具有不同颜色的代码字来检测到不同的有效数据。在此协议中，接收器以及发射器将颜色信息作为请求信号发送，然后通过检测相互颜色信息是否相同来执行数据传输。由于两个请求信号都可以很简单，因此可以进行重叠的通信。由于必须将数据和颜色信息捆绑在异步数据传输中的相同电线上，因此从数据和颜色信息的混合双轨代码中检测有效数据很重要。提出的编码的使用使通过计算代码字的总和可以轻松合并和检测数据和颜色信息。在多值双向电流模式电路中，由于电流模式线性求和可以通过无需任何活动设备的接线来实现，因此提出的异步电路变得简单。此外，两侧的当前信号可以在相同的电线上超级置，这是多价值电流模式逻辑的重要特征，可以实现控制信号多路复用方案。比较器与感官放大器的使用使得很容易快速检测代码字的组件总和。实际上，在0.18UM CMOS技术中评估了使用多价值电流模式逻辑电路的拟议异步数据转移方案的数据传输周期要比在归一化功率消散下的相应二进制CMOS实现的速度快1.5倍。较少的