Studies on Logic Design Methods Adaptable to CAD DB

适应CAD DB的逻辑设计方法研究

基本信息

批准号：
10480060
负责人：
KAMBAYASHI Yahiko
金额：
$ 7.42万
依托单位：
KYOTOUNIVERSITY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (B).
财政年份：
1998
资助国家：
日本
起止时间：
1998 至 2000
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-10480060/
关键词：
Logic Optimization Logic Synthesis Transduction Method Error Compensation Method Pass Transistor CMOS Annealing Method Permissible Function 最適論理化 FPGA 拡張許容関数集合論理設計

项目摘要

Reuse of design data and design automation of logic circuits becomes important because logic circuits become to have large and complex structure. Though the CAD database is an indispensable technology to realize reuse of design data, it is difficult to integrate existing design methods and database technology as it is. Thus we have studied and improved design methods of logic circuits suitable for databases, which realize the CAD database. The themes of this research includes an improvement of the transduction method, development of a method for FPGA logic circuit design, development of a reuse technique of logic circuits, and development of a technique for saving power consumption of logic circuits.In 1998, we have developed SSPFs (Super Set of Permissible Functions) that extend CSPFs (Compatible Sets of Permissible Functions) used by the transduction method and increased the degree of freedom in transformation of logic circuits. We also have proposed PSPFDs (Priority based SPFDs) tha … More t generalize the notion of SPFDs representing the logical degree of freedom of FPGA circuits and achieved a 40% reduction in the area of circuits. We have proposed a new algorithm for logic circuit design with saving power consumption that uses 3-state CMOS and realized the function assignment considering saving power consumption.In 1999, we have developed two methods : a method that applies simulated annealing, one of metaheuristics, to the transduction method, and a method of logic optimization based on the notion of PF (Permissible Function) used by the transduction method for a pass transistor logic that is expected to realize more low power consumption circuits than existing CMOS logic.In 2000, first, we have improved the optimization method for pass transistor logic circuits. we have found errors in a book of logic circuits, published more than 35 years ago, that collects minimal circuits calculated by hand by the improved method. Secondly, the development of a optimization method of CMOS logic have progressed. We have applied the method to the pass transistor logic that developed the preceding year for decreasing the number of transistors in logic gates. We also have introduced and applied the transduction method to reduce the number of logic gates. More effective optimization method of logic circuits have been developed by integrating the CMOS logic optimization method and the transduction method. Less

逻辑电路的数据和设计自动化重要的效果是具有较大且复杂的结构。开发逻辑电路设计方法的开发，开发逻辑电路的重复使用技术以及开发用于节省逻辑电路的功率组合的技术。在1998年，一组允许的功能），该功能扩展了CSPF（允许功能的兼容集）转导方法并增加了逻辑回路的自由度。使用三态CMO并意识到函数分配了iDIDMS的功能。在1999年，我们开发了两种方法：一种应用模拟退火，一种元启示疗学，对transistor逻辑进行了更大的预期？与现有的CMOS逻辑相比，我们的消耗量更多。我们已应用于逻辑上的晶体管逻辑，我们还引入了throught子。优化方法和转移