Hybrid graphene/III-V system selectively grown on Si nanotips: A correlation study of structural and optoelectronic properties

在硅纳米尖端上选择性生长的杂化石墨烯/III-V族系统：结构和光电特性的相关研究

• 批准号: 428250328
• 负责人: Privatdozentin Dr. Fariba Hatami
• 金额: --
• 依托单位: Institut für Physik
• 依托单位国家: 德国
• 项目类别: Research Grants
• 资助国家: 德国
• 项目状态: 未结题
• 来源: https://gepris.dfg.de/gepris/projekt/428250328?language=en
• 关键词: Hybrid; graphene; III; system; selectively

Monolithic growth of group III-V semiconductors with their superior optoelectronic properties on Si is a sophisticated solution for the integration of III-V devices into mature Si technology and CMOS platforms. In spite of large efforts for the III-V/Si epitaxy over the last decades, the growth of high quality, low-defect density III-V materials on Si remains a challenge due to the heterogeneous material properties, such as lattice spacing, symmetries of the crystals, surface energy, and thermal-expansion coefficients. An alternative epitaxial approach for selective growth of III-V compounds on patterned Si nanostructures has been reported, realizing high-quality heterostructures. Known under the name nanoheteroepitaxy, this approach reduces plastic relaxation via dividing the strain energy between the III-V layer and the underlying Si structures, allows better control of the III-V quantum structures position and suppressing contamination segregation. Our project will, hence, investigate the use of the nanoheteroepitaxy method for the monolithic growth of III-V quantum structures on patterned Si wafers. There, we will first focus on studying III-V on Si growth kinetics, defect formation mechanisms and optoelectronic properties of III-V material on Si-nanostructures as well as the influence of the strain engineering on the compliance effect in nanoheteroepitaxy. In order to have a broad range for tailoring the strain and the optoelectronic properties of III-V material, we propose to grow GaxIn1-xP buffer layers on Si nanotips (x between 1 and 0 results in 0.3%8% lattice mismatch and a Eg between 2.3 and 1.3 eV), and to use strain-engineered quantum wells and dots embedded in the buffer layer as active electron-hole recombination channels. Graphene (Gr) will be later used as electrical top contact, which is beneficial for the device performance due to its high optical transparency and electrical transport qualities. The structural properties of graphene after transfer onto the III-V/Si and particularly, the defects at the Gr/III-V interface and the charge transfer will be investigated. Our attempt will be accompanied by research for precise material control using combined growth and epitaxial techniques, and correlated structural and optoelectronic characterization on ensemble of quantum light emitters as well as on single III-V nano islands. The proposed approach delivers solution possibilities for challenges such as III-V/Si high-defects density, which is detrimental to optoelectronic devices, the QDs site control and the contamination of III-V during monolithic growth on Si. Our approach brings freedom in tailoring the III-V material and leads to a myriad of opportunities and challenges to investigating III-V/Si selective growth, studying strain and bandgap tuning by extending the III-V spectra, gaining knowledge on III-V/Gr interface, and approaching efficient and tunable light emitters on the Si platform for integrated optoelectronics.

SI A AA A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A型SI技术和CMOS平台的单层组。 ，由于晶格间距，晶体的对称性，表面能和热表达系数，SI缓解质量的低缺陷密度III-V材料挑战。据报道，在纳米层上的纳米结构已知，这种方法可以减少plia，从而控制了纳米层的epitaxy方法。图案化的SI晶圆。定制III-V材料的光电特性的广泛范围，我们建议在0.3％8％晶格不匹配和2.3至1.3 eV之间的Si Nanotips lts上的Gaxin1-XP缓冲层层，并使用菌株工程量子量子将井嵌入缓冲液中，以用作电气触点，这对设备的性能有益于高光的透明度和电气传输质量。 SI和SI I-V接口和电荷转移将使用联合和外延技术进行控制。 ，这对光电设备有害，QDS网站控制和调整III-V材料的控制Reedom，并导致研究IIII-V /SI选择性增长，研究III的IIII-V /SI选择性增长，研究III的菌株和带盖调节的各种机会和挑战。 -v光谱，获得IIII-V/GR界面的知识，并在SI平台上接近T和可调的光发射器，以进行集成光电子。