Charge compensation in 4H silicon carbide - Simulation, modelling and experimental verification

4H 碳化硅中的电荷补偿 - 仿真、建模和实验验证

基本信息

项目摘要

For power semiconductor devices in silicon, device patterns with charge compensation between adjacent p- and n-doped semiconductor regions are applied. These patterns enable the realization of unipolar devices with blocking voltage under blocking operation and low device resistance in forward conduction. First semiconductor devices fabricated in silicon carbide employing charge compensation patterns are following design rules that are either based on theoretical calculations which are based on the well-controlled silicon technology or using non-empiric trial-and-error methods. Hereby, a suitable design of the compensation patterns is achieved either with a poor degree of compensation at all or only by repetitive process variations.This proposal is aiming to provide the foundation for the realization of charge compensation patterns with a high degree of compensation, and to conduct a systematic investigation regarding their electrical characteristics and the impact of physical effects. In particular, the impact of incomplete activation and ionization of dopants in SiC as well as the surface passivation on the degree of compensation, the breakdown voltage and the drift resistance is investigated. This allows for an improvement of existing simulation models for higher accuracy and the derivation of an analytical description of these charge compensation patterns that are not (as in silicon) based on a fully controlled semiconductor technology.With the aid of analytical modelling based on charge compensation patterns in silicon as a starting point and considering incomplete activation of dopants, both modelling and two dimensional TCAD simulations for lateral charge compensation patterns in silicon carbide will be implemented. The fabrication of lateral test patterns corresponding to the simulations and their electric characterization are used to increase the modelling accuracy and extension of the underlying models based on the measurement results. These models are then used to transfer and verify the results to lateral power transistors in SiC. Additionally, dynamic switching experiments will be carried out to evaluate the impact of physical effects like incomplete ionisation on electrical properties (e.g. avalanche breakdown) in charge compensation patterns. Finally, vertical charge compensation patterns will be realized to validate the methodology of this scientific approach as a whole.The results from this research project will simplify the fabrication of lateral and vertical power semiconductor devices on 4H-SiC by provision of accurate physical models for charge compensation.
对于硅中的功率半导体器件,应用了在相邻的p掺杂半导体区域和n掺杂半导体区域之间具有电荷补偿的器件图案。这些模式使得能够实现在阻断操作下具有阻断电压并且在正向传导中具有低器件电阻的单极器件。第一个采用电荷补偿模式在碳化硅中制造的半导体器件遵循的设计规则要么基于基于良好控制的硅技术的理论计算,要么使用非经验的试错方法。由此,补偿图案的合适设计要么在补偿程度很差的情况下实现,要么仅通过重复的工艺变化来实现。该建议旨在为实现具有高补偿程度的电荷补偿图案提供基础,并且对它们的电气特性和物理效应的影响进行系统研究。特别是,研究了SiC中掺杂剂的不完全激活和电离以及表面钝化对补偿程度、击穿电压和漂移电阻的影响。这允许改进现有的仿真模型以获得更高的精度,并导出这些电荷补偿模式的分析描述,这些电荷补偿模式不是(如在硅中)基于完全控制的半导体技术。借助基于电荷补偿的分析建模以硅中的横向电荷补偿图案为起点,考虑到掺杂剂的不完全激活,将对碳化硅中的横向电荷补偿图案进行建模和二维TCAD模拟。与模拟相对应的横向测试图案的制作及其电特性用于根据测量结果提高建模精度和基础模型的扩展。然后使用这些模型将结果传输到 SiC 横向功率晶体管并进行验证。此外,还将进行动态开关实验,以评估电荷补偿模式中不完全电离等物理效应对电性能(例如雪崩击穿)的影响。最后,将实现垂直电荷补偿模式,以从整体上验证这一科学方法的方法。该研究项目的结果将通过提供精确的电荷物理模型来简化 4H-SiC 上横向和垂直功率半导体器件的制造赔偿。

项目成果

期刊论文数量(8)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Aluminum acceptor activation and charge compensation in implanted p-type 4H-SiC
注入 p 型 4H-SiC 中的铝受体激活和电荷补偿
  • DOI:
    10.1063/1.5096440
  • 发表时间:
    2019
  • 期刊:
  • 影响因子:
    1.6
  • 作者:
    J. Weiße;M. Hauck;M. Krieger;A. J. Bauer;T. Erlbacher
  • 通讯作者:
    T. Erlbacher
Determination of Compensation Ratios of Al-Implanted 4H-SiC by TCAD Modelling of TLM Measurements
  • DOI:
    10.4028/www.scientific.net/msf.963.445
  • 发表时间:
    2019-01-01
  • 期刊:
  • 影响因子:
    0
  • 作者:
    Kocher, M.;Yao, B. T.;Bauer, A. J.
  • 通讯作者:
    Bauer, A. J.
Impact of Al-Ion Implantation on the Formation of Deep Defects in n-Type 4H-SiC
Al离子注入对n型4H-SiC深层缺陷形成的影响
RESURF n-LDMOS Transistor for Advanced Integrated Circuits in 4H-SiC
用于 4H-SiC 高级集成电路的 RESURF n-LDMOS 晶体管
  • DOI:
    10.1109/ted.2020.3002730
  • 发表时间:
    2019
  • 期刊:
  • 影响因子:
    3.1
  • 作者:
    J. Weiße;C. Matthus;H. Mitlehner;T.Erlbacher
  • 通讯作者:
    T.Erlbacher
Analysis of Compensation Effects in Aluminum-Implanted 4H-SiC Devices
  • DOI:
    10.4028/www.scientific.net/msf.924.184
  • 发表时间:
    2018-06
  • 期刊:
  • 影响因子:
    0
  • 作者:
    J. Weiße;Martin Hauck;T. Sledziewski;Mattias Tschiesche;M. Krieger;A. Bauer;H. Mitlehner;L. Frey;T. Erlbacher
  • 通讯作者:
    J. Weiße;Martin Hauck;T. Sledziewski;Mattias Tschiesche;M. Krieger;A. Bauer;H. Mitlehner;L. Frey;T. Erlbacher
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Privatdozent Dr.-Ing. Tobias Erlbacher其他文献

Privatdozent Dr.-Ing. Tobias Erlbacher的其他文献

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