Collaborative Research: FuSe: Monolithic 3D Integration (M3D) of 2D Materials-Based CFET Logic Elements towards Advanced Microelectronics

合作研究：FuSe：面向先进微电子学的基于 2D 材料的 CFET 逻辑元件的单片 3D 集成 (M3D)

• 批准号: 2329189
• 负责人: Sang-Hoon Bae
• 金额: $ 53.84万
• 依托单位: Washington University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-10-01 至 2026-09-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2329189&HistoricalAwards=false
• 关键词: Collaborative; Research; FuSe; Monolithic; 3D

Non-Technical:Electronic integration has proven foundational to modern information society. Specifically, the up-scaling in semiconductor industry is one of the most critical steps towards reduced production cost, enhanced performance, and integration density. In this project, a potential transformative technique for developing next-generation semiconductor computing processor is proposed. By prototyping novel integrated electronic devices based on two-dimensional (2D) semiconductors with atomic thickness, ultrathin microelectronic logic element is studied, leading to not only fundamental physics advancements in low-dimensional materials community, but also major advances in semiconductor technologies synergizing vital research areas of materials, electronic devices, and novel circuity architecture. College students will be trained and involved for workforce upgrade and knowledge dissemination. Workshops, symposiums, and tutorials are planned, as well as technical exchange at international conferences to enhance the impact and findings of this project. Collaborations and technical discussions are also planned with semiconductor companies to foster technological translation workforce alignment.Technical:An interdisciplinary study on the three-dimensional (3D) integration of complementary-field effect transistors (C-FET) made by 2D material is proposed for the ultimate solution for the next-generation computing processors. Despite the recent advancement using multi-dimensional gate control technology, the current material and device architectures still encounter fundamental limitation on integration density and multifunctionality. A groundbreaking paradigm leap synergizing the material- and device- and circuit- level has thus attracted enormous interest from both academia and industry. Three significant breakthroughs will be made: (i) Single-crystalline 2D materials have atomic thickness and self-confine nature, it maintains excellent electrical property even under sub-nanometer scale, securing ultimate scalability. (ii) C-FETs are based on the concept of 3D heterogeneous integration of CMOS devices, allowing aggressive cell scaling to realize compact logic circuity. (iii) C-FET based monolithic 3D integration with image sensors will be achieved to explore the possibility of various integration capability based on the C-FET-based circuits. Four objectives will be implemented to promote the suggested breakthroughs: (1) Using the geometrically confined growth method that has recently proven groundbreaking success, high-quality single-crystal 2D materials can be manufactured at large-scale with high yield. (2) Single-crystalline 2D material-based C-FETs will be fabricated with competitive state-of-the-art performance. (3) Enabled with such C-FETs, circuit design of logic cells can be implemented including a full adder and a full substractor. (4) Ultimately, a novel encoder can be realized leveraging this new type of microprocessor, which is a main component of analog-to-digital converters (ADC). Through this, M3D integration with image sensors will be demonstrated to explore integration possibility of the C-FETs circuits. The next-generation computing processor proposed in this project will provide detailed understanding on how to demonstrate high-quality 2D materials, C-FETs, and C-FET based circuits that are key to maximizing their full potential, ultimate scalability and gate-controllability, for semiconductor technologies and industries. The successful achievement of these objectives will pave a new avenue for the next-generation computing processor that can meet the computational demands in the era of data explosion with less power consumption, leading to a considerable surge of interest in the science and application of 2D semiconductors.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

非技术：电子整合已证明现代信息社会的基础。具体而言，半导体行业的缩放是降低生产成本，增强性能和集成密度的最关键步骤之一。在该项目中，提出了一种用于开发下一代半导体计算处理器的潜在变革技术。通过基于具有原子厚度的二维（2D）半导体的原型原型，研究了超明显的微电源逻辑元素，不仅导致低维材料社区的基本物理进步，而且还导致了半多个技术的重大进步，还可以在半强度技术的材料研究区域的材料架构，电子循环练习，电子，电子练习，以及电子循环练习，电子，电子探测器。大学生将接受培训并参与劳动力升级和知识传播。计划了研讨会，研讨会和教程，以及国际会议上的技术交流，以增强该项目的影响和发现。还计划与半导体公司进行协作和技术讨论，以促进技术翻译劳动力对齐。技术：一项关于互补效应晶体管（C-FET）整合的三维集成（C-FET）的跨学科研究，提出了2D材料为下一代计算机计算的最终解决方案。尽管最近使用多维门控制技术进步，但当前的材料和设备体系结构仍然对集成密度和多功能性遇到基本限制。因此，开创性的范式LEAP协同材料和设备和电路水平，引起了学术界和工业的巨大兴趣。将实现三个重大突破：（i）单晶2D材料具有原子厚度和自我缩质性质，即使在亚纳米尺度下，它也能保持出色的电特性，从而确保最终的可扩展性。 （ii）C-FET基于CMOS设备的3D异质整合的概念，从而使侵略性的细胞缩放能够实现紧凑的逻辑循环。 （iii）将基于基于图像传感器的基于C-FET的整体3D整合，以探索基于基于C的电路的各种整合能力的可能性。将实施四个目标来促进所建议的突破：（1）使用最近证明开创性成功的几何限制生长法，可以以高收益的大规模制造高质量的单晶2D材料。 （2）单晶2D基于材料的C-FET将以竞争性的最新性能制造。 （3）使用此类C-FET启用，可以实现逻辑单元的电路设计，包括完整的加法器和完整的索取器。 （4）最终，可以实现一种新颖的编码器来利用这种新型的微处理器，这是类似物到数字转换器（ADC）的主要组成部分。通过此，将证明与图像传感器的M3D集成，以探索C-FETS电路的整合可能性。该项目中提出的下一代计算处理器将提供有关如何展示高质量2D材料，C-FET和C-FET基于C-FET的电路的详细理解，这些电路是对半导体技术和行业的全部潜力，最终的可伸缩性和栅极控制性的关键。这些目标的成功实现将为下一代计算处理器铺平一条新的途径，该途径可以满足数据爆炸时代的计算需求，而功耗较少，从而导致对2D半导体的科学和应用的兴趣激增。该奖项奖励NSF的法定任务，并反映出通过评估的构成群体的构成群体的构成群体的构成群体，这是众所周知的。