SBIR Phase II: Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits

SBIR 第二阶段：航天级高可靠性集成电路的低成本封装解决方案

• 批准号: 2304975
• 负责人: Abhijeet Ghoshal
• 金额: $ 99.96万
• 依托单位: APOGEE SEMICONDUCTOR, INC.
• 依托单位国家: 美国
• 项目类别: Cooperative Agreement
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-12-01 至 2025-11-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2304975&HistoricalAwards=false
• 关键词: SBIR; Phase; II; Low; Cost

This Small Business Innovation Research (SBIR) Phase II project enables the use of modern packaging technologies for integrated circuits in space applications. While failures in satellites are common and high insurance claims due to such failures are frequent, the space industry continues to use integrated circuits (ICs) that are either unreliable (non-space-grade) and are prone to failure, or space-grade ICs with large and costly packaging and compromised performance. This innovation offers a cost-effective and reduced-size solution for the packaging of ICs that can operate reliably over the extreme temperature cycles experienced in space applications. Wafer Level Chip Scale Packaging (WLCSP) is lighter, smaller, and has superior electrical and thermal performance when compared to traditional leaded packaging solutions. These attributes make it desirable to the space industry by reducing size and weight, while not compromising performance. As this packaging technology is limited due to its performance under temperature cycling, this project seeks to address this reliability problem by using existing manufacturing techniques coupled with a novel design concept. This Small Business Innovation Research (SBIR) Phase II project aims to redesign specific layers within the existing Wafer Level Chip Scale Packaging (WLCSP) to improve reliability under temperature cycling. The temperature cycle reliability problem in the WLCSP is caused by a thermal expansion rate mismatch of silicon die and the copper circuit board. This project will redesign the redistribution layer within the WLCSP to compensate for this mismatch by effectively moving the interconnects on the silicon die in accordance with the faster moving printed circuit board (PCB). This project will make the benefits of WLCSP accessible for the entire space community.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

这项小型企业创新研究（SBIR）II期项目使现代包装技术用于空间应用中的集成电路。尽管卫星的失败是普遍的，并且由于这种失败而引起的高保险索赔，但空间行业继续使用不可靠（非空间级）且容易失败的综合电路（ICS），或者具有大型且昂贵的包装和损害性能的空间级IC。这项创新为IC的包装提供了一种具有成本效益的尺寸解决方案，这些解决方案可以在空间应用中经历的极端温度周期中可靠地运行。与传统的铅包装解决方案相比，晶圆级芯片秤包装（WLCSP）较轻，较小，并且具有出色的电气和热性能。这些属性通过减少尺寸和重量而在不损害性能的同时，使其对空间行业具有理想。由于这种包装技术在温度循环下的性能限制，因此该项目试图通过使用现有的制造技术以及新型设计概念来解决此可靠性问题。这项小型企业创新研究（SBIR）II期项目的目标是重新设计现有的晶圆芯片量表包装（WLCSP）内的特定层，以提高温度循环的可靠性。 WLCSP中的温度周期可靠性问题是由硅死亡和铜电路板的热膨胀速率不匹配引起的。该项目将在WLCSP中重新设计重新分布层，以通过根据更快的移动印刷电路板（PCB）有效地移动硅死模上的互连来补偿此不匹配。该项目将使WLCSP在整个太空社区中获得好处。该奖项反映了NSF的法定任务，并且使用基金会的知识分子优点和更广泛的影响审查标准，被认为值得通过评估来获得支持。