Collaborative Research: SHF: Medium: Automated Word Level Synthesis for Hardware Code Generation and Verified Abstraction

合作研究：SHF：Medium：用于硬件代码生成和验证抽象的自动字级合成

• 批准号: 2106949
• 负责人: Grigory Fedyukovich
• 金额: $ 44.99万
• 依托单位: Florida State University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-07-15 至 2025-06-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2106949&HistoricalAwards=false
• 关键词: Collaborative; Research; SHF; Medium; Automated

The success of formal methods has enabled widespread applications in ensuring correctness, safety, and reliability of computing systems. This project on automated word-level synthesis is providing a core utility for diverse applications since the bit-vector representation of various computing systems is well-suited for both hardware designs and low-level software. By virtue of the underlying formal reasoning, the programs synthesized by the automated methods are guaranteed to be correct-by-construction, thus improving their quality and improving developer productivity. The two application domains targeted in this project – computer networks and systems-on-chips – form core components of the computing infrastructure that provides numerous products and services of interest to society. The research activities involve training and mentoring graduate students, and development of teaching material.Real-world applications that require bit-precise reasoning for synthesis and verification, such as in the domains of computer networks and hardware, remain challenging in terms of performance and scalability. One main reason is that existing techniques for synthesis over bitvectors rely largely on a translation of multi-bit words down to bits, called bit-blasting, which destroys the high-level structure in the application programs. This project aims to improve automated synthesis of word-level bit-precise programs, with applications in network packet processing and verification of systems-on-chip (SoCs). The core research activities include development of a new approach to word-level synthesis. The synthesizer is guided by word-level quantifier elimination over bit-vectors without bit-blasting. It also leverages the well-known framework of Syntax-Guided Synthesis (SyGuS), where the search for a program is guided by domain knowledge captured in the form of context-free grammars, program sketches, and partial specifications comprising input-output examples. The project develops suitable grammars and synthesis methods in two application domains: (1) synthesis of code for programmable network switches from high-level packet processing programs, and (2) synthesis of verified architecture-level abstractions from hardware designs of accelerators and processors in modern SoCs. These improve techniques for code generation (from high-level to low-level programs) and verified abstraction (from low-level to high-level programs), respectively.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

正式方法的成功已使宽度应用程序在确保计算系统的正确性，安全性和可靠性方面。自动化级别合成的项目为潜水员应用程序提供了核心实用性，因为各种计算系统的位矢量表示非常适合硬件设计和低级软件。凭借基本的正式推理，保证通过自动化方法合成的程序是正确的，从而提高了其质量并提高了开发人员的生产率。该项目中针对的两个应用程序域 - 计算机网络和芯片系统 - 构成了计算基础架构的核心组成部分，该计算基础架构为社会提供了许多感兴趣的产品和服务。培训和心理学生的研究活动以及教学材料的开发。真正需要对合成和验证进行比较的推理的应用程序，例如在计算机网络和硬件的领域中，在性能和可扩展性方面仍然具有挑战。主要原因是，现有的综合技术在比特值上的合成技术很大程度上依赖于将多位单词的翻译归为钻头，称为BIT-BLASTING，它破坏了应用程序程序中的高级结构。该项目旨在改善单词级位专业程序的自动合成，并在网络数据包处理和芯片系统中的验证（SOCS）中进行了应用。核心研究活动包括开发一种新的文字综合方法。合成器以单词级量化器的进化为指导，而不是位于位矢量的情况下。它还利用语法引导的合成（SYGUS）的著名框架，在该框架中，对程序的搜索是由以无上下文的语法，程序草图和部分规范的形式捕获的域知识来指导的。该项目在两个应用程序域中开发了合适​​的语法和综合方法：（1）从高级数据包处理程序中的可编程网络交换机的综合，以及（2）现代SOC中加速器和处理器的硬件设计的验证架构级抽象的合成。这些改进了代码生成技术（从高级到低级程序）和经过验证的抽象（从低级到高级程序）。该奖项反映了NSF的法定任务，并通过使用基金会的知识分子优点和广泛的审查标准通过评估来诚实地通过评估来诚实地支持。