STTR Phase I: Low-Cost Packaging Solution for Space-Grade and High-Reliability Integrated Circuits

STTR 第一阶段：航天级高可靠性集成电路的低成本封装解决方案

• 批准号: 2052442
• 负责人: Abhijeet Ghoshal
• 金额: $ 25.6万
• 依托单位: APOGEE SEMICONDUCTOR, INC.
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-12-15 至 2022-12-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2052442&HistoricalAwards=false
• 关键词: STTR; Phase; Low; Cost; Packaging

The broader impact/commercial potential of this Small Business Technology Transfer Research (STTR) Phase I project seeks to enable cost effective, compact, and higher performing integrated circuits for space applications. Space electronics have lagged the commercial state-of-the-art by over a decade. The lack of high performing, cost effective packaging solutions further increases this gap. Traditionally, space applications utilize large, expensive, and low-performing ceramic packages that limit adoption of radiation-hardened semiconductors into the “New Space” applications such as Low Earth Orbit (LEO) mega-constellations for worldwide internet. “New Space” companies that design and manufacture electronics for satellites are the primary target customers while non-radiation-hardened applications that behave in extreme thermal environments, such as aviation and “down borehole" electronics for the oil/gas drilling, are also a target market for the technology. This Small Business Technology Transfer Research (STTR) Phase I project seeks to prove the feasibility of the innovation to effectively address the reliability challenges in interconnect (IC) packages operating over the extended temperature ranges required in space applications. There are multiple unknowns and technical challenges to be explored, requiring extensive interdisciplinary research and development. The goal is to arrive at a solution that effectively alleviates the mechanical stresses caused by the thermal expansion, while having acceptable thermal and electrical performance, particularly in high-power ICs, such as power converters/regulators. The research will determine the level of stress applied by the structure to the underlying silicon and the level of stress that is permitted before damage to the underlying silicon die will occur. The project will also assess the reliability/risks associated with the temperature cycling and evaluate materials that are best suited to address the technical needs, while also offering a cost-effective manufacturable solution. The team will investigate the suitability of existing commercial fabrication processes and how modifications in them may impact their manufacturability. They will also investigate possible geometry enhancements to reduce buckling, explore the stress-alleviation versus thermal resistance tradeoffs in various geometries and compositions of structures, and create models that support design guidelines for optimal placement of sensitive circuits on the die.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

该小型企业技术转移研究 (STTR) 第一阶段项目的更广泛影响/商业潜力旨在为空间应用提供具有成本效益、紧凑且性能更高的集成电路，其落后于商业最先进技术。十多年来，缺乏高性能、具有成本效益的封装解决方案进一步扩大了这一差距。传统上，太空应用使用大型、昂贵且低性能的陶瓷封装，这限制了抗辐射半导体在“新太空”应用中的采用。作为近地轨道设计和制造卫星电子产品的“新空间”公司是主要目标客户，而在极端热环境下运行的非抗辐射应用，例如航空和“井下”电子产品。该小型企业技术转让研究 (STTR) 第一阶段项目旨在证明该创新的可行性，以有效解决互连 (IC) 封装运行的可靠性挑战。太空所需的扩展温度范围应用中有许多未知因素和技术挑战需要探索，需要广泛的跨学科研究和开发，目标是找到一种有效减轻热膨胀引起的机械应力，同时具有可接受的热性能和电性能的解决方案。该研究还将确定结构对底层硅施加的应力水平以及底层硅芯片损坏之前允许的应力水平。评估与温度相关的可靠性/风险循环并评估最适合满足技术需求的材料，同时提供具有成本效益的可制造解决方案，该团队将研究现有商业制造工艺的适用性以及对其进行修改可能会如何影响其可制造性。几何增强以减少屈曲，探索各种几何形状和结构组成中的应力缓解与热阻权衡，并创建支持设计指南的模型，以实现芯片上敏感电路的最佳布局。该奖项反映了 NSF 的法定使命，并通过使用基金会的智力优点和更广泛的影响审查标准进行评估，被认为值得支持。