FoMR: Adaptive Branch Prediction

FoMR：自适应分支预测

• 批准号: 1912617
• 负责人: Daniel Jimenez
• 金额: $ 20万
• 依托单位: Texas A&M Engineering Experiment Station
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2019
• 资助国家: 美国
• 起止时间: 2019-10-01 至 2024-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1912617&HistoricalAwards=false
• 关键词: FoMR; Adaptive; Branch; Prediction

Microprocessors run programs by executing instructions in an assembly-line fashion. The first step decides which instruction to work on next. When a decision-making branch instruction is reached, the processor can't get the next instruction until the decision is made several steps later. To avoid delays, processors predict where the next instruction will come from. This project investigates ways of improving the accuracy of this and related predictions by adapting the predictor to changing conditions during program execution. Successful outcomes of this project will improve efficiency for mobile phones, desktop and laptop computers, and datacenters. The project will recruit graduate students from under-represented groups and contribute to classroom teaching.The project focuses on microarchitectural predictors driven by machine learning. These predictors use a large number of input features. Currently, features are fixed at design time to cover a wide range of possible program behaviors. The project explores how to adaptively learn features for the current workload. This adaptation will improve accuracy while reducing hardware overhead by using fewer features. This approach applies to several kinds of predictors including conditional and indirect branch prediction, cache reuse prediction, prefetch filtering, replacement in the branch target buffer, instruction cache, and translation look-aside buffers.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

微处理器通过以装配线方式执行指令来运行程序。第一步决定下一步要处理哪条指令。当到达决策分支指令时，处理器无法获得下一条指令，直到稍后做出决策。为了避免延迟，处理器预测下一条指令将来自哪里。该项目研究通过使预测器适应程序执行期间不断变化的条件来提高此预测和相关预测的准确性的方法。该项目的成功成果将提高移动电话、台式机和笔记本电脑以及数据中心的效率。该项目将从代表性不足的群体中招收研究生，并为课堂教学做出贡献。该项目的重点是机器学习驱动的微架构预测器。这些预测器使用大量输入特征。目前，功能在设计时就已固定，以涵盖各种可能的程序行为。该项目探讨了如何自适应地学习当前工作负载的功能。这种调整将提高准确性，同时通过使用更少的功能来减少硬件开销。该方法适用于多种预测器，包括条件和间接分支预测、缓存重用预测、预取过滤、分支目标缓冲区中的替换、指令缓存和翻译后备缓冲区。该奖项反映了 NSF 的法定使命，并被认为是值得的通过使用基金会的智力优势和更广泛的影响审查标准进行评估来获得支持。

项目成果

Dynamic Set Stealing to Improve Cache Performance

• DOI: 10.1109/sbac-pad55451.2022.00017
• 发表时间: 2022-11
• 期刊: 2022 IEEE 34th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)
• 作者: Brady Testa;Samira Mirbagher Ajorpaz;Daniel A. Jiménez

SB-Fetch: synchronization aware hardware prefetching for chip multiprocessors

SB-Fetch：芯片多处理器的同步感知硬件预取

• DOI: 10.1145/3392717.3392735
• 发表时间: 2020
• 期刊: ICS '20: Proceedings of the 34th ACM International Conference on Supercomputing
• 作者: AlBarakat, Laith M.;Gratz, Paul V.;Jiménez, Daniel A.
• 通讯作者: Jiménez, Daniel A.

Morrigan: A Composite Instruction TLB Prefetcher

• DOI: 10.1145/3466752.3480049
• 发表时间: 2021-10
• 期刊: MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture
• 作者: Georgios Vavouliotis;Lluc Alvarez;Boris Grot;Daniel A. Jiménez;Marc Casas

Exploiting Page Table Locality for Agile TLB Prefetching

• DOI: 10.1109/isca52012.2021.00016
• 发表时间: 2021-06
• 期刊: 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA)
• 作者: Georgios Vavouliotis;Lluc Alvarez;Vasileios Karakostas;K. Nikas;N. Koziris;Daniel A. Jiménez;Marc Casas

SLAP-CC: Set-Level Adaptive Prefetching for Compressed Caches

SLAP-CC：压缩缓存的集级自适应预取

• DOI: 10.1109/iccd56317.2022.00018
• 发表时间: 2022
• 期刊: IEEE
• 作者: AlBarakat, Laith M.;Gratz, Paul V.;Jimenez, Daniel A.
• 通讯作者: Jimenez, Daniel A.