CRII: CSR: Programmable Heterogeneous Memory Systems via Multiple Address Spaces and RAM Lake

CRII：CSR：通过多个地址空间和 RAM Lake 的可编程异构内存系统

基本信息

批准号：
1850566
负责人：
Jason Lowe-Power
金额：
$ 17.5万
依托单位：
University of California-Davis
依托单位国家：
美国
项目类别：
Standard Grant
财政年份：
2019
资助国家：
美国
起止时间：
2019-07-01 至 2022-06-30
项目状态：
已结题

来源：
https://www.nsf.gov/awardsearch/showAward?AWD_ID=1850566&HistoricalAwards=false
关键词：
CRII CSR Programmable Heterogeneous Memory

项目摘要

Computer systems store an increasingly vast amount of data. The major limiting factor for computer performance is data retrieval from memory, not data processing. At the same time, these systems integrate various physical storage technologies adding complexity to data retrieval. The project will develop new improvements to computing system hardware to increase data retrieval performance in systems with many memory technologies by addressing two initial questions: how to move data between memory technologies efficiently and how to represent different types of data flexibly for both the programmer and the hardware system.This project will produce new hardware mechanisms and software interfaces that will increase the performance and simplify the programming of heterogeneous memory systems. Additionally, the work will expand the understanding of how software will use these nascent heterogeneous memory systems by deeply studying current and emerging systems and applications. This work will be broken into two main thrusts. First, designing novel hardware support for fine-grained user-directed and system-directed data movement, and second, designing hardware support for multiple address spaces to improve the interfaces to heterogeneous memory for programmers and system software.Computing systems ranging from datacenters and supercomputers to mobile devices and Internet-of-Things systems are processing an increasing amount of data, which is driving the trend toward heterogeneous memory systems. The proposed research will increase the performance and usability of these computing systems. This research will be presented to the scientific community and the public through conference publications, software repositories, and blog posts on a public website. Additionally, this project will develop an upper-divisional undergraduate/introductory graduate class on programming heterogeneous systems.All data, software, and other artifacts generated through this research will be carefully managed and archived through third party repositories such as GitHub and cloud service providers. The software artifacts will be maintained indefinitely using publicly accessible history tracking version control systems. Data that can be regenerated by re-running simulation software will be kept for at least five years, as well as the foreseeable future. Links to repositories containing the simulators used, code produced, and data used in the published results can be found at https://arch.cs.ucdavis.edu/projects/heterogeneous-memory.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

计算机系统存储的数据量越来越大。计算机性能的主要限制因素是从内存中检索数据，而不是数据处理。同时，这些系统集成了各种物理存储技术，增加了数据检索的复杂性。该项目将对计算系统硬件进行新的改进，通过解决两个初始问题来提高采用多种内存技术的系统中的数据检索性能：如何在内存技术之间有效地移动数据以及如何为程序员和用户灵活地表示不同类型的数据。硬件系统。该项目将产生新的硬件机制和软件接口，以提高异构存储系统的性能并简化编程。此外，这项工作将通过深入研究当前和新兴的系统和应用程序，扩大对软件如何使用这些新生异构内存系统的理解。这项工作将分为两个主要目标。首先，为细粒度的用户引导和系统引导的数据移动设计新颖的硬件支持，其次，为多个地址空间设计硬件支持，以改进程序员和系统软件与异构内存的接口。从数据中心到超级计算机的计算系统移动设备和物联网系统正在处理越来越多的数据，这推动了异构存储系统的发展趋势。拟议的研究将提高这些计算系统的性能和可用性。这项研究将通过会议出版物、软件存储库和公共网站上的博客文章向科学界和公众展示。此外，该项目将开发一个关于异构系统编程的高年级本科/研究生入门课程。通过本研究生成的所有数据、软件和其他工件将通过第三方存储库（例如 GitHub 和云服务提供商）仔细管理和存档。软件工件将使用可公开访问的历史跟踪版本控制系统无限期地维护。可以通过重新运行模拟软件重新生成的数据将保留至少五年，以及可预见的未来。包含已发布结果中使用的模拟器、生成的代码和使用的数据的存储库的链接可以在 https://arch.cs.ucdavis.edu/projects/heterogeneous-memory 找到。该奖项反映了 NSF 的法定使命，并被视为值得通过使用基金会的智力优点和更广泛的影响审查标准进行评估来支持。

项目成果

期刊论文数量（4）

专著数量（0）

科研奖励数量（0）

会议论文数量（0）

专利数量（0）

A Case Against Hardware Managed DRAM Caches for NVRAM Based Systems

针对基于 NVRAM 系统的硬件管理 DRAM 缓存的案例

DOI：
10.1109/ispass51385.2021.00036
发表时间：
2021-03-01
期刊：
2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)
影响因子：
0
作者：
Mark Hildebr;Julian T. Angeles;Jason Lowe;V. Akella
通讯作者：
V. Akella

Enabling Design Space Exploration for RISC-V Secure Compute Environments

实现 RISC-V 安全计算环境的设计空间探索

DOI：
发表时间：
2021-06
期刊：
Fifth Workshop on Computer Architecture Research with RISC-V
影响因子：
0
作者：
Akram, Ayaz;Akella, Venkatesh;Peisert, Sean;Lowe
通讯作者：
Lowe

AutoTM: Automatic Tensor Movement in Heterogeneous Memory Systems using Integer Linear Programming

AutoTM：使用整数线性规划在异构存储系统中自动张量移动

DOI：
10.1145/3373376.3378465
发表时间：
2020-03-09
期刊：
Proceedings of the Twenty-Fifth International Conference on Architectural Support for Programming Languages and Operating Systems
影响因子：
0
作者：
Mark Hildebr;J. Khan;Sanjeev N. Trika;Jason Lowe;V. Akella
通讯作者：
V. Akella

Performance Analysis of Scientific Computing Workloads on General Purpose TEEs

通用 TEE 上科学计算工作负载的性能分析

DOI：
10.1109/ipdps49936.2021.00115
发表时间：
2021-05-01
期刊：
2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS)
影响因子：
0
作者：
Ayaz Akram;Anna Giannakou;V. Akella;Jason Lowe;S. Peisert
通讯作者：
S. Peisert