SHF : Medium : Collaborative Research: Decentralized On-Chip Infrastructure for Robustness and Portability in Heterogeneous Multicores
SHF:媒介:协作研究:异构多核中的分散片上基础设施的稳健性和可移植性
基本信息
- 批准号:1764000
- 负责人:
- 金额:$ 45万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2018
- 资助国家:美国
- 起止时间:2018-09-01 至 2024-08-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
When new hardware options emerge in modern computer systems, software code must be rewritten or retailored to work on the new systems. The result is that application code-bases do not seamlessly port from one generation to another. Even worse, they often cannot fully or nimbly adjust to dynamic variations during execution even on a given system. This work will mitigate the complexity, portability, and robustness challenges of heterogeneous platforms, while also continuing to garner high performance. Leveraging the research team's experience in open-source software release and curriculum development, this project will distribute the tools developed in these research thrusts as well as teach these new tools via an existing course on design and programming of heterogeneous architectures.Addressing the research challenges of this project requires moving away from a processor-centric viewpoint, and towards a broader perspective aimed at managing communication issues. The research team will introduce the concept of "hardware shims" that can be employed for a range of uses such as acting as prefetchers, translating between different communication protocols, or assisting with dynamic verification of properties specified by the designer. The project will automate the design and synthesis of static or dynamic shims that can verify the memory consistency of an arbitrary heterogeneous multicore for which the designer provides a set of ordering specifications. The proposed research activities will demonstrate gains in performance, functional robustness, and code portability as the application is compiled and executed on systems that differ significantly in terms of the number and type of processors and specialized hardware accelerators that they use.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
当现代计算机系统中出现新的硬件选项时,必须重写或重新设计软件代码才能在新系统上运行。结果是应用程序代码库无法从一代无缝移植到另一代。更糟糕的是,即使在给定的系统上,它们通常也无法完全或灵活地适应执行期间的动态变化。这项工作将减轻异构平台的复杂性、可移植性和稳健性挑战,同时继续获得高性能。利用研究团队在开源软件发布和课程开发方面的经验,该项目将分发在这些研究重点中开发的工具,并通过现有的异构架构设计和编程课程教授这些新工具。该项目需要摆脱以处理器为中心的观点,转向旨在管理通信问题的更广泛的视角。 研究团队将介绍“硬件垫片”的概念,该概念可用于多种用途,例如充当预取器、在不同通信协议之间进行转换或协助设计者指定的属性的动态验证。该项目将自动化静态或动态垫片的设计和合成,这些垫片可以验证设计者为其提供一组订购规范的任意异构多核的内存一致性。拟议的研究活动将展示性能、功能稳健性和代码可移植性方面的收益,因为应用程序是在处理器和专用硬件加速器的数量和类型显着不同的系统上编译和执行的。该奖项反映了 NSF 的法定使命,并通过使用基金会的智力价值和更广泛的影响审查标准进行评估,被认为值得支持。
项目成果
期刊论文数量(13)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
CRYLOGGER: Detecting Crypto Misuses Dynamically
- DOI:10.1109/sp40001.2021.00010
- 发表时间:2020-07
- 期刊:
- 影响因子:0
- 作者:Luca Piccolboni;G. D. Guglielmo;L. Carloni;S. Sethumadhavan
- 通讯作者:Luca Piccolboni;G. D. Guglielmo;L. Carloni;S. Sethumadhavan
PR-ESP: An Open-Source Platform for Design and Programming of Partially Reconfigurable SoCs
PR-ESP:用于部分可重配置 SoC 设计和编程的开源平台
- DOI:10.23919/date56975.2023.10137141
- 发表时间:2023
- 期刊:
- 影响因子:0
- 作者:Seyoum, Biruk;Giri, Davide;Chiu, Kuan-Lin;Natter, Bryce;Carloni, Luca
- 通讯作者:Carloni, Luca
DB4HLS: A Database of High-Level Synthesis Design Space Explorations
DB4HLS:高级综合设计空间探索数据库
- DOI:10.1109/les.2021.3066882
- 发表时间:2021
- 期刊:
- 影响因子:1.6
- 作者:Ferretti, Lorenzo;Kwon, Jihye;Ansaloni, Giovanni;Di Guglielmo, Giuseppe;Carloni, Luca;Pozzi, Laura
- 通讯作者:Pozzi, Laura
EigenEdge: Real-Time Software Execution at the Edge with RISC-V and Hardware Accelerators
- DOI:10.1145/3576914.3587510
- 发表时间:2023-05
- 期刊:
- 影响因子:0
- 作者:Kuan-Lin Chiu;Guy Eichler;Biruk B. Seyoum;L. Carloni
- 通讯作者:Kuan-Lin Chiu;Guy Eichler;Biruk B. Seyoum;L. Carloni
Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs
建立在 FPGA 上综合捆绑数据异步电路的完整方法
- DOI:10.1109/islped.2019.8824912
- 发表时间:2019
- 期刊:
- 影响因子:0
- 作者:Bhardwaj, Kshitij;Mantovani, Paolo;Carloni, Luca P.;Nowick, Steven M.
- 通讯作者:Nowick, Steven M.
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Luca Carloni其他文献
Luca Carloni的其他文献
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{{ truncateString('Luca Carloni', 18)}}的其他基金
SHF: Small: Rethinking CAD for System-Level Design via Interactivity, Learning, and Collaboration
SHF:小型:通过交互性、学习和协作重新思考 CAD 的系统级设计
- 批准号:
1527821 - 财政年份:2015
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
SHF: Small: Synthesis-Driven Methods for Reuse, Integration, and Programming of Specialized Accelerators in Systems-on-Chip
SHF:小型:用于片上系统中专用加速器的重用、集成和编程的综合驱动方法
- 批准号:
1219001 - 财政年份:2012
- 资助金额:
$ 45万 - 项目类别:
Continuing Grant
EAGER: Collaborative Research: Heterogeneous Cores, Memory-Hierarchy and Communication Architectures for Future CMPs
EAGER:协作研究:未来 CMP 的异构核心、内存层次结构和通信架构
- 批准号:
1147406 - 财政年份:2011
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
CPS: Medium: Collaborative Research: GOALI: Methods for Network-Enabled Embedded Monitoring and Control for High-Performance Buildings
CPS:中:协作研究:GOALI:高性能建筑的网络嵌入式监控方法
- 批准号:
0931870 - 财政年份:2010
- 资助金额:
$ 45万 - 项目类别:
Continuing Grant
SHF: Small: Integrated Infrastructures for On-Chip Communication and Power Management in Message-Passing Multicore Processors
SHF:小型:消息传递多核处理器中片上通信和电源管理的集成基础设施
- 批准号:
1018236 - 财政年份:2010
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
CPA-CSA: Photonic Interconnection Networks for Chip-Multiprocessor Computing Systems
CPA-CSA:用于芯片多处理器计算系统的光子互连网络
- 批准号:
0811012 - 财政年份:2008
- 资助金额:
$ 45万 - 项目类别:
Continuing Grant
CAREER: Integrating Control, Computation, and Communication - A Design Automation Flow for Distributed Embedded Systems
职业:集成控制、计算和通信 - 分布式嵌入式系统的设计自动化流程
- 批准号:
0644202 - 财政年份:2007
- 资助金额:
$ 45万 - 项目类别:
Standard Grant
CMOS VLSI Design of Low Power Scalable Heterogeneous Networks for Multi-Core Systems-on-Chip
多核片上系统低功耗可扩展异构网络 CMOS VLSI 设计
- 批准号:
0541278 - 财政年份:2006
- 资助金额:
$ 45万 - 项目类别:
Continuing Grant
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