CAREER: Trading Communication and Storage for Computation to Enhance Energy Efficiency

职业：以通信和存储换取计算以提高能源效率

• 批准号: 1553042
• 负责人: Ulya Karpuzcu
• 金额: $ 43.65万
• 依托单位: University of Minnesota-Twin Cities
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2016
• 资助国家: 美国
• 起止时间: 2016-02-01 至 2022-01-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1553042&HistoricalAwards=false
• 关键词: CAREER; Trading; Communication; Storage; Computation

Looking forward, a fundamental challenge in computer systems is the Power Wall, where, due to imbalances in technology scaling, not all the compute engines that find place on chip can be powered on at the same time. The Power Wall is transforming all levels of the system stack, including the parallel architecture landscape. Communication power, as induced by data movement and the orchestration thereof, along with storage power, dominates computation power. As the degree of concurrency increases, communication power becomes even more prominent due to more frequent data transfers. At the same time, emerging memory technologies are not mature enough to keep up with the corresponding capacity, bandwidth, and performance requirements within a tight power budget. An amnesic processor, can minimize, if not eliminate, the power and performance overhead associated with data storage, retrieval, and communication, thus, operate more energy efficiently. The limited storage of the amnesic machine represents the short-term memory, which lacks long-term memory by construction. When compared to its classic counterparts, an amnesic machine can facilitate more compute engines to occupy the area once devoted to (long-term) memory, which can further be harnessed for recomputation. Recomputation can transparently convert workloads to become more compute intensive such that they can make a better use of classic architectures optimized for performance, as opposed to energy efficiency. This project intends to unlock the energy efficiency premise of amnesic machines. To this end, the PI proposes to explore compiler and microarchitecture support to decide when to replace remote loads with re-computation. The research has three major thrusts: (i) at compiler time, integer linear programming based optimization will be performed to generate a probabilistic energy-minimal re-computation schedule; (ii) runtime controller will be designed to decide when to re-compute based on the information the compiler provides; and (iii) memory hierarchy will also be explored to maximize energy efficiency. Interaction with emerging technologies and reliability issues will also be considered. The integrated education and outreach plan includes workshop organization, undergraduate curriculum, and Eureka! program for K-12 girls .

展望未来，计算机系统的一个根本挑战是 Power Wall，由于技术扩展的不平衡，并非所有芯片上的计算引擎都能同时启动。 Power Wall 正在改变所有级别的系统。系统堆栈，包括由数据移动及其编排引起的通信能力以及存储能力，在计算能力中占主导地位。随着并发程度的增加，由于数据更加频繁，通信能力变得更加突出。与此同时，记忆也随之转移。技术还不够成熟，无法在紧张的功耗预算内满足相应的容量、带宽和性能要求。记忆删除处理器可以最大限度地减少（如果不能消除的话）与数据存储、检索和通信相关的功耗和性能开销。因此，失忆机器的有限存储空间代表了短期记忆，而与传统的同类机器相比，失忆机器可以让更多的计算引擎占用该区域。致力于（长期）内存，可以进一步用于重新计算，重新计算可以透明地将工作负载转换为计算密集型，以便它们可以更好地利用针对性能优化的经典架构，而不是能源效率。为此，PI 建议探索编译器和微架构支持，以决定何时用重新计算替换远程加载。该研究有三个主要重点：（i）在编译器时，整数线性。将执行基于编程的优化，以生成概率能量最小重新计算时间表；(ii) 运行时控制器将被设计为根据编译器提供的信息决定何时重新计算；以及 (iii) 内存层次结构也将被设计；还将考虑与新兴技术和可靠性问题的互动。综合教育和推广计划包括研讨会组织、本科课程和针对 K-12 女孩的尤里卡计划。