CAREER: New Foundations for Next-Generation Reliable Throughput Architecture Design
职业生涯:下一代可靠吞吐量架构设计的新基础
基本信息
- 批准号:1351054
- 负责人:
- 金额:$ 43万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Continuing Grant
- 财政年份:2014
- 资助国家:美国
- 起止时间:2014-02-01 至 2015-06-30
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
With the demand on improving performance and energy-efficiency, novel technologies including non-volatile memory (e.g., spin-transfer torque RAM (STT-RAM)), 3D integration technology (3D), and near-threshold voltage computing (NTC) have been increasingly deployed in the state-of-the-art throughput processors. Since the novel technologies are not designed for dependable computing, the reliability challenges, which have been a crucial issue in conventional throughput architecture design, become the major obstacle for integrating them into next-generation throughput processors. There is a pressing need for the investigation of innovative techniques that are able to take advantage of throughput processors' unique features for characterizing and improving the reliability of the next-generation new-technology based throughput architecture design. The paramount reliability challenges in throughput processors include particle strikes induced soft errors, hard errors driven by aging effects, and manufacturing process variations. The principle investigator is building new foundations for vulnerability characterization and prediction, error detection, and fault tolerance against those dominant reliability challenges in throughput processors integrated with novel technologies. The project objectives include: (1) modeling and analyzing the vulnerability of novel-technology (e.g., STT-RAM, NTC, and 3D) enabled throughput processors in the presence of soft error, aging effects, and process variations; (2) fast and accurate predictive model to forecast the vulnerability phase behavior of throughput processors under new technologies; (3) developing the light-weight error detection mechanisms; and (4) exploring the opportunities and challenges introduced by the novel technologies to cost-effectively tolerate various types of errors in next-generation throughput architecture design. The proposed research will significantly promote the capability of architecting reliable throughput processors in future technologies beyond CMOS, making it possible to fulfill the Moore's Law without suffering the negative effects caused by various fault mechanisms. Moreover, this project will realize the desire of applying throughput processors into a wide range of computing scale from mobile computing to cloud computing, and increasing the deployment of throughput processors in support of supercomputing in science and engineering (e.g., finance, medical, biology, petroleum, aerospace, and geology). This project will also contribute to society through engaging high-school and undergraduate students from minority-serving institutions into research, expanding the computer engineering curriculum with reliability modeling and optimization techniques on throughput processors, attracting women and under-represented groups into graduate education, and disseminating research infrastructure for education and training of US IT workforce.
随着提高性能和能效的需求,包括非易失性存储器(例如自旋转移矩RAM(STT-RAM))、3D集成技术(3D)和近阈值电压计算(NTC)在内的新技术已经出现。越来越多地部署在最先进的吞吐量处理器中。由于新技术不是为可靠计算而设计的,因此可靠性挑战一直是传统吞吐量架构设计中的关键问题,成为将它们集成到下一代吞吐量处理器中的主要障碍。迫切需要研究能够利用吞吐量处理器的独特功能来表征和提高基于下一代新技术的吞吐量架构设计的可靠性的创新技术。吞吐量处理器中最重要的可靠性挑战包括粒子撞击引起的软错误、老化效应驱动的硬错误以及制造工艺变化。主要研究人员正在为漏洞表征和预测、错误检测和容错奠定新的基础,以应对与新技术集成的吞吐量处理器中的主要可靠性挑战。项目目标包括:(1) 建模并分析新技术(例如 STT-RAM、NTC 和 3D)启用的吞吐量处理器在存在软错误、老化效应和工艺变化的情况下的脆弱性; (2)快速准确的预测模型,预测新技术下吞吐量处理器的脆弱阶段行为; (3)开发轻量级错误检测机制; (4)探索新技术带来的机遇和挑战,以经济高效地容忍下一代吞吐量架构设计中的各种类型的错误。所提出的研究将显着提高在 CMOS 之外的未来技术中构建可靠吞吐量处理器的能力,从而可以在不遭受各种故障机制造成的负面影响的情况下满足摩尔定律。此外,该项目将实现将吞吐量处理器应用于从移动计算到云计算的广泛计算规模的愿望,并增加吞吐量处理器的部署以支持科学和工程(例如金融、医学、生物、石油、航空航天和地质)。该项目还将通过吸引少数族裔服务机构的高中生和本科生参与研究、通过吞吐量处理器的可靠性建模和优化技术扩展计算机工程课程、吸引女性和代表性不足的群体进入研究生教育以及传播用于美国 IT 劳动力教育和培训的研究基础设施。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Xin Fu其他文献
An miR-143 promoter variant associated with essential hypertension.
与原发性高血压相关的 miR-143 启动子变异体。
- DOI:
- 发表时间:
2014 - 期刊:
- 影响因子:0.1
- 作者:
Xin Fu;Li Guo;Z. Jiang;Luosha Zhao;A. Xu - 通讯作者:
A. Xu
Jumping Like an Insect: From Biomimetic Inspiration to a Jumping Minirobot Design
像昆虫一样跳跃:从仿生灵感到跳跃迷你机器人设计
- DOI:
- 发表时间:
2013 - 期刊:
- 影响因子:0
- 作者:
Wei;Fei Li;Xin Fu;C. Stefanini;G. Bonsignori;U. Scarfogliero;P. Dario - 通讯作者:
P. Dario
Design configuration selection for hard-error reliable processors via statistical rules
通过统计规则为硬错误可靠处理器设计配置选择
- DOI:
- 发表时间:
2014 - 期刊:
- 影响因子:2.6
- 作者:
Ying Zhang;Lide Duan;Bin Li;Lu Peng;Xin Fu - 通讯作者:
Xin Fu
The application of peritoneal drainage in the surgical treatment for neonates with necrotizing enterocolitis
腹腔引流在新生儿坏死性小肠结肠炎手术治疗中的应用
- DOI:
- 发表时间:
2017 - 期刊:
- 影响因子:0
- 作者:
Jixue Zhao;Xin Fu - 通讯作者:
Xin Fu
Evaluating biotoxicity with fibroblasts derived from human embryonic stem cells.
评估源自人胚胎干细胞的成纤维细胞的生物毒性。
- DOI:
- 发表时间:
2012 - 期刊:
- 影响因子:3.2
- 作者:
Xiao;Sheng;T. Cao;Xin Fu;Guang - 通讯作者:
Guang
Xin Fu的其他文献
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{{ truncateString('Xin Fu', 18)}}的其他基金
SHF: Small: Enabling On-Device Bayesian Neural Network Training via An Integrated Architecture-System Approach
SHF:小型:通过集成架构系统方法实现设备上贝叶斯神经网络训练
- 批准号:
2130688 - 财政年份:2021
- 资助金额:
$ 43万 - 项目类别:
Standard Grant
SHF: Medium: Collaborative Research: Enhancing Mobile VR/AR User Experience: An Integrated Architecture-System Approach
SHF:媒介:协作研究:增强移动 VR/AR 用户体验:集成架构系统方法
- 批准号:
1900904 - 财政年份:2019
- 资助金额:
$ 43万 - 项目类别:
Continuing Grant
SHF: Small: Leveraging User Preferences for Mobile User Experience Improvement
SHF:小型:利用用户偏好改善移动用户体验
- 批准号:
1619243 - 财政年份:2016
- 资助金额:
$ 43万 - 项目类别:
Standard Grant
SHF:Small:Collaborative Research:Exploring Energy-Efficient GPGPUs Through Emerging Technology Integration
SHF:Small:协作研究:通过新兴技术集成探索节能 GPGPU
- 批准号:
1537062 - 财政年份:2014
- 资助金额:
$ 43万 - 项目类别:
Standard Grant
CAREER: New Foundations for Next-Generation Reliable Throughput Architecture Design
职业生涯:下一代可靠吞吐量架构设计的新基础
- 批准号:
1537085 - 财政年份:2014
- 资助金额:
$ 43万 - 项目类别:
Continuing Grant
SHF:Small:Collaborative Research:Exploring Energy-Efficient GPGPUs Through Emerging Technology Integration
SHF:Small:协作研究:通过新兴技术集成探索节能 GPGPU
- 批准号:
1320730 - 财政年份:2013
- 资助金额:
$ 43万 - 项目类别:
Standard Grant
Student Travel Support for the Twenty-First International Conference on Parallel Architectures and Compilation Techniques (PACT), 2012
2012 年第二十届并行架构和编译技术国际会议 (PACT) 的学生旅行支持
- 批准号:
1241490 - 财政年份:2012
- 资助金额:
$ 43万 - 项目类别:
Standard Grant
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