Advanced Modeling and Design of High-Performance ADC-Based Serial Links
基于高性能 ADC 串行链路的高级建模和设计
基本信息
- 批准号:1202508
- 负责人:
- 金额:$ 36万
- 依托单位:
- 依托单位国家:美国
- 项目类别:Standard Grant
- 财政年份:2012
- 资助国家:美国
- 起止时间:2012-05-01 至 2015-12-31
- 项目状态:已结题
- 来源:
- 关键词:
项目摘要
Intellectual Merit: The high-speed serial link architectures and design techniques proposed in this work aim to significantly improve inter-chip interconnect energy efficiency and bandwidth density, which is necessary for continued scaling of future compute systems. While significant progress has been made in increasing serial link data rates through the use of analog/mixed-signal equalization, there are limits to the amount of channel loss that analog/mixed-signal equalizers can compensate and also challenges in scaling these circuits to nanometer technologies. This motivates the use of analog-to-digital converter-based analog front ends in inter-chip interconnect receiver design. The work's research goal is to develop high-performance energy-efficient converter-based high-speed serial link architectures applicable to future computing systems. To accomplish this goal, an ultra-fast statistical-modeling optimization framework for converter-based serial links that investigates trade-offs in resolution and analog/digital equalization complexity will be developed and leveraged in the design of the proposed architecture. Novel circuit topologies will be developed that enable efficient modulation agile transmitters and the embedding of partial analog equalization in the converter. The combination of system level optimization with circuit-level accuracy and new ultra-efficient circuit topologies enables architectures capable of leveraging more digital equalization whose efficiency improves with each technology generation.Broader Impact: The explosion in interconnect bandwidth capacity provided by this converter-based serial link architecture will allow the realization of numerous transformative applications, such as future smart mobile devices capable of Tflop/s performance, multi-channel high-resolution magnetic resonance imaging, and exascale supercomputers necessary for climate modeling and protein folding simulations. Interconnect architectures developed with the proposed optimization framework will have a broad impact on not only the semiconductor industry, but also on the sustainability and security of the nation as a whole, as it will dramatically reduce the energy these integrated systems demand. This project will include an interdisciplinary educational program involving 2 Ph.D. and 3 undergraduate students, with a commitment in several engaging outreach activities to foster the representation of women and minority groups. Project results will be broadly disseminated by inclusion in the syllabi and website of the graduate course entitled "High-Speed Links Circuits and Systems" and through publication in national and international journals and conferences.
智力优点:这项工作中提出的高速串行链接架构和设计技术旨在显着提高芯片间互连能源效率和带宽密度,这对于未来计算系统的持续扩展是必不可少的。尽管通过使用模拟/混合信号均衡,在提高串行链路数据速率方面取得了重大进展,但模拟/混合信号均衡器可以补偿的通道损失量有限制,并且在将这些电路缩放到纳米表方面也有挑战技术。这激发了在片间互连接收器设计中使用基于模数转换器的模拟前端。该作品的研究目标是开发适用于未来计算系统的高性能节能转换器的高速串行链接体系结构。为了实现这一目标,将针对基于转换器的串行链路进行超快速统计模型优化框架,该链接研究了分辨率和模拟/数字均衡复杂性方面的权衡,并将其利用在拟议体系结构的设计中。将开发出新的电路拓扑结构,以实现有效的调制敏捷发射机以及转换器中部分模拟均衡的嵌入。系统级优化与电路级的精度和新的超高电路拓扑的结合使架构能够利用更多的数字均衡化,其效率随着每个技术的生成的提高。Boader的影响:基于转换器串行提供的互连带宽能力的爆炸式爆炸链接体系结构将允许实现众多变革性应用程序,例如能够具有TFLOP/S性能的未来智能移动设备,多通道高分辨率磁共振成像以及用于气候建模和蛋白质折叠模拟所需的Exascale超级计算机。通过拟议的优化框架开发的互连体系结构将不仅对半导体行业产生广泛的影响,还将对整个国家的可持续性和安全性产生广泛的影响,因为它将大大减少这些集成系统需求的能量。该项目将包括一个涉及2博士学位的跨学科教育计划。和3名本科生,在几项参与的外展活动中承诺,以促进妇女和少数群体的代表。项目结果将通过包含在题为“高速链接电路和系统”的研究生课程的教学大纲和网站上,并通过在国家和国际期刊和会议上发布。
项目成果
期刊论文数量(0)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
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Samuel Palermo其他文献
Samuel Palermo的其他文献
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{{ truncateString('Samuel Palermo', 18)}}的其他基金
ACED Fab: Co-Design of Novel Electronic-Photonic Systems for Energy-Efficient Coherent Optical Interconnects
ACED Fab:用于节能相干光互连的新型电子-光子系统的协同设计
- 批准号:
2314868 - 财政年份:2023
- 资助金额:
$ 36万 - 项目类别:
Standard Grant
EARS: A Wideband Frequency-Agile Silicon Photonic mm-Wave Receiver with Automatic Jammer Suppression via Rapidly Reconfigurable Optical Notch Filters
EARS:宽带频率捷变硅光子毫米波接收器,通过快速可重构光学陷波滤波器实现自动干扰抑制
- 批准号:
1547432 - 财政年份:2015
- 资助金额:
$ 36万 - 项目类别:
Standard Grant
CAREER: Process, Voltage, and Temperature (PVT)-Tolerant CMOS Photonic Interconnect Transceiver Architectures
职业:耐工艺、电压和温度 (PVT) 的 CMOS 光子互连收发器架构
- 批准号:
1254830 - 财政年份:2013
- 资助金额:
$ 36万 - 项目类别:
Standard Grant
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