SHF: Medium: A Collaborative Framework for Developing Green Electronics for Next-Generation Computing Applications

SHF：Medium：为下一代计算应用开发绿色电子的协作框架

• 批准号: 1162633
• 负责人: Kaustav Banerjee
• 金额: $ 40万
• 依托单位: University of California-Santa Barbara
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-07-01 至 2016-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1162633&HistoricalAwards=false
• 关键词: SHF; Medium; Collaborative; Framework; Developing

The information technology (IT) industry is confronting an acute problem in the form of increasing power and energy consumption by electronic products, which is projected to have dramatic impact on the global energy crisis. This is partly due to the fact that a significant fraction of the energy consumption in the IT industry results from the computing components? (such as servers) energy need, which in turn, depends on the power consumption of the various integrated circuits in these components. Hence, designing low-power and energy-efficient integrated circuits or Green Electronics constitutes a key area for sustaining the irreversible growth of the global IT industry. Achieving energy-efficiency is also of critical importance for all electronic circuits used in mobile applications for increasing the battery life. Energy-efficiency can be achieved by lowering both dynamic and leakage power consumption. However, lowering of power using traditional techniques becomes increasingly difficult beyond the 22 nanometer technology node. This is due to the fact that in such nanoscale devices, the most effective knob used for lowering power, namely the power supply voltage, cannot be scaled as rapidly as in earlier technology generations without incurring significant performance penalty arising from the inability to simultaneously reduce the threshold voltage. Simultaneous scaling of threshold voltage, which is essential for maintaining a certain ON to OFF ratio of the device currents (that is essential in digital circuits where the transistors are used as switches), leads to a substantial increase in the sub-threshold leakage (OFF state) current, owing to the non-abrupt nature of the switching characteristics of MOSFETs, thereby making the devices very energy inefficient. This project aims to address this critical issue at the most fundamental level by designing circuits and systems enabled by novel electronic devices whose switching behaviors are near-ideal, that is, they can move from ON to OFF state and vice-versa, almost instantly. In particular, the PIs plan to design and fabricate ultra energy-efficient heterojunction Tunneling Field-Effect Transistors (T-FETs) that employ a fundamentally different injection mechanism in the form of band-to-band tunneling (BTBT) to achieve near ideal switching. They also plan to develop necessary modeling/simulation, and optimization techniques for these devices, and explore circuits and systems specifically enabled by these devices to demonstrate unprecedented power and energy savings in electronic products. This collaborative four-year project brings together an outstanding team of scientists for addressing one of the fundamental limitations of MOSFETs and is expected to have wide implications for the semiconductor and electronics industries. The project is expected to help digital switches and circuits (including high-performance microprocessors) to attain their ultimate limits (in terms of density and performance) and also open new opportunities in embedded memories (including DRAMs and Flash) and remote sensors, thereby maintaining U.S. competitiveness in the worldwide semiconductor market. Broader impact of the proposed research is also well recognized, particularly in the light of emerging 3-D ICs, where integration of low leakage and relatively temperature insensitive T-FETs could be exploited to build next-generation high-performance and low-power integrated circuits. The overall program also ties research to education at all levels (K-12, undergraduate, graduate, continuing-ed) partly via participation in programs designed by education professionals, besides focusing on recruitment and retention of underrepresented groups in nanoscience and engineering.

信息技术 (IT) 行业正面临着电子产品功耗和能源消耗不断增加的严峻问题，预计这将对全球能源危机产生巨大影响。部分原因是 IT 行业能源消耗的很大一部分来自于计算组件？ （例如服务器）能源需求，而这又取决于这些组件中各种集成电路的功耗。因此，设计低功耗、高能效的集成电路或绿色电子是维持全球IT产业不可逆转增长的关键领域。 对于移动应用中使用的所有电子电路来说，实现能源效率对于延长电池寿命也至关重要。 通过降低动态功耗和泄漏功耗可以实现能源效率。然而，在 22 纳米技术节点之后，使用传统技术降低功耗变得越来越困难。 这是因为，在这种纳米级器件中，用于降低功率的最有效旋钮（即电源电压）无法像早期技术中那样快速缩放，而不会因无法同时降低功率而导致显着的性能损失。阈值电压。 同时缩放阈值电压对于维持器件电流的特定开/关比至关重要（这在晶体管用作开关的数字电路中至关重要），导致亚阈值泄漏（OFF）大幅增加状态）电流，由于 MOSFET 开关特性的非突变特性，从而使器件的能源效率非常低。该项目旨在通过设计由新型电子设备支持的电路和系统，从最基本的层面解决这一关键问题，这些电子设备的开关行为接近理想，也就是说，它们几乎可以立即从开状态转变为关状态，反之亦然。 特别是，PI 计划设计和制造超节能异质结隧道场效应晶体管 (T-FET)，该晶体管采用带间隧道 (BTBT) 形式的根本不同的注入机制，以实现近乎理想的开关。他们还计划为这些设备开发必要的建模/仿真和优化技术，并探索这些设备专门支持的电路和系统，以展示电子产品前所未有的功耗和节能。这个为期四年的合作项目汇集了一支杰出的科学家团队，旨在解决 MOSFET 的基本限制之一，预计将对半导体和电子行业产生广泛影响。 该项目预计将帮助数字开关和电路（包括高性能微处理器）达到其最终极限（在密度和性能方面），并为嵌入式存储器（包括 DRAM 和闪存）和远程传感器开辟新的机遇，从而保持美国在全球半导体市场的竞争力。 拟议研究的更广泛影响也得到了广泛认可，特别是考虑到新兴的 3D IC，其中可以利用低泄漏和相对温度不敏感的 T-FET 的集成来构建下一代高性能和低功耗集成电路。整个计划还将研究与各级教育（K-12、本科生、研究生、继续教育）联系起来，部分通过参与教育专业人员设计的计划，此外还重点关注纳米科学和工程领域代表性不足群体的招募和保留。