SBIR Phase I: Self-Compensating Ultra-Wideband Direct Digital-to-RF D/A Converter

SBIR 第一阶段：自补偿超宽带直接数字至射频 D/A 转换器

• 批准号: 1143344
• 负责人: Oren Eliezer
• 金额: $ 15万
• 依托单位: XW, LLC
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2012
• 资助国家: 美国
• 起止时间: 2012-01-01 至 2012-06-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1143344&HistoricalAwards=false
• 关键词: SBIR; Phase; Self; Compensating; Ultra

This Small Business Innovation Research Phase I project attempts to overcome fundamental limitations that are currently inhibiting the realization of much needed low-cost high-performance digital-to-analog converters (DACs), which can accommodate the wide bandwidths of current and future communication systems, software-defined-radios (SDR), and a wide range of other applications. The focus of this research is the development of circuitry and signal processing and control algorithms that would effectively address impairments experienced in a complementary-metal-oxide-semiconductor (CMOS) implementation of a novel DAC topology designed to accommodate ultra-wide bandwidths. While the CMOS fabrication process may be tailored for digital processors and memory, it is a most challenging environment for the design of high-performance, wide dynamic range analog circuitry. The solutions being developed essentially provide the DAC with ?self-healing? capabilities that allow it to overcome inevitable impairments such as device mismatches, non-linearities, and timing misalignments. Preliminary results indicate the validity of the proposed architectures and approaches and it is anticipated that a fabrication-ready design will result from the Phase 1 research.The involvement of researchers and PhD candidates from academia in this research allows them exposure into most challenging research topics that are of great interest to the semiconductor industry. The broader impact/commercial potential of this project is in allowing ultra-high-performance data-conversion capabilities to be integrated into low-cost CMOS system-on-chip (SoC) solutions that are widely used in commercial applications of various types ranging from communications and multimedia to instrumentation. In particular, the technology being developed will allow for the integration and low-cost realization of this most critical function in a true SDR. The proposed innovation, targeting the self-sufficient-compensation for the effects of inevitable impairments, such as fabrication-process variations, mismatches, non-linearities, and timing misalignments, through the employment of novel built-in calibration and compensation circuitry and algorithms, will allow integrated DACs to deliver ultra-high performance (e.g., 16-bit resolution at rates above 10GHz) without requiring costly testing at fabrication, production-yield losses, laser trimming, or any other consequence of traditional design and manufacturing of high-performance analog integrated circuits. The approach to be developed has a broader impact on chip manufacturing, as these impairments represent limiting factors in other functions as well. As an enabling technology, the proposed innovation can potentially greatly increase the size of the existing market for data converters, currently at $3B, and allow for various new consumer applications where wide bandwidths of operation are needed and cost is a constraint.

该小型企业创新研究第一阶段项目试图克服目前阻碍实现急需的低成本高性能数模转换器 (DAC) 的基本限制，DAC 可以适应当前和未来通信系统的宽带宽、软件定义无线电 (SDR) 以及各种其他应用。 这项研究的重点是开发电路、信号处理和控制算法，以有效解决在互补金属氧化物半导体 (CMOS) 实现新型 DAC 拓扑（旨在适应超宽带宽）时遇到的缺陷。虽然 CMOS 制造工艺可以针对数字处理器和存储器进行定制，但对于高性能、宽动态范围模拟电路的设计来说，它是最具挑战性的环境。 正在开发的解决方案本质上为 DAC 提供了“自我修复”功能。使其能够克服不可避免的缺陷，例如设备不匹配、非线性和时序失调。 初步结果表明所提出的架构和方法的有效性，预计第一阶段的研究将产生可制造的设计。学术界的研究人员和博士生参与这项研究使他们能够接触到最具挑战性的研究主题，半导体行业对此非常感兴趣。 该项目更广泛的影响/商业潜力在于允许将超高性能数据转换功能集成到低成本 CMOS 片上系统 (SoC) 解决方案中，这些解决方案广泛用于各种类型的商业应用，包括通信和多媒体到仪器仪表。特别是，正在开发的技术将允许在真正的 SDR 中集成并低成本实现这一最关键的功能。所提出的创新旨在通过采用新颖的内置校准和补偿电路和算法，对不可避免的损伤（例如制造工艺变化、失配、非线性和时序偏差）的影响进行自给自足的补偿，将允许集成 DAC 提供超高性能（例如，10GHz 以上速率下的 16 位分辨率），而无需在制造过程中进行昂贵的测试、生产良率损失、激光修整或任何其他后果高性能模拟集成电路的传统设计和制造。 待开发的方法对芯片制造具有更广泛的影响，因为这些缺陷也代表了其他功能的限制因素。 作为一项使能技术，所提出的创新有可能大大增加数据转换器现有市场的规模（目前为 3B 美元），并允许各种需要宽带宽操作且成本受到限制的新消费应用。