CPA-DA: Integrated Methodology for Managing Noise in Next Generation Multi-Core SoCs

CPA-DA：下一代多核 SoC 中噪声管理的集成方法

• 批准号: 0811317
• 负责人: Eby Friedman
• 金额: $ 24.89万
• 依托单位: University of Rochester
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2008
• 资助国家: 美国
• 起止时间: 2008-08-01 至 2012-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0811317&HistoricalAwards=false
• 关键词: CPA; DA; Integrated; Methodology; Managing

CPA-DA: Integrated Methodology for Managing Noise in Next Generation Multi-Core SoCsProposal No. 0811317PI: Eby G. FriedmanUniversity of RochesterAbstractThe focus of this project is the development of an integrated methodology for managing noise that addresses the multiple interactions among different noise sources to support the design of next generation multi-core mixed-signal systems-on-chips (SoCs). Accurate, yet computationally efficient noise models will be developed and combined with noise reduction techniques to effectively control the signal characteristics within a system. Leveraging the classical noise propagation model from communications, a novel unified approach will be applied to model noise generation, propagation, and reception among diverse system components, supporting the development of aggregate noise cancellation techniques. Design tradeoffs to alleviate the effects of multiple noise sources will be investigated and design guidelines will be developed. The interdependence among diverse noise effects at the device, circuit, and multi-core levels will be investigated and design strategies that minimize noise across mixed-signal components will be developed. Emphasis will be placed on the global features responsible for generating and propagating noise among different system components, such as the power distribution networks, the global interconnect lines, the inter-core synchronization schemes, and the silicon substrate. The sensitivity of the noise models and reduction techniques to process and environmental variations will also be investigated. The ultimate objective is that upon completion of this project, signal uncertainty in analog circuits and delay uncertainty in digital circuits due to multiple noise effects in multi-core SoCs will be better understood and accurately modeled in a computationally efficient manner, while integrated noise reduction methodologies will be developed to design the next generation of high complexity, high performance integrated circuits. These research results will provide new directions for educational initiatives targeting both university teaching and research activities in the broader academic community. Undergraduate projects demonstrating the practical aspects of the research results will be devised in collaboration with graduate students. A course related to the research will be developed and offered to graduate and senior undergraduate students with disparate backgrounds. A tutorial will be prepared for presentation at major conferences. The PI will also participate in a University program intended to enhance minority enrollment in graduate engineering and science programs. The intellectual and social objectives of this project are intended to greatly surpass existing limitations in the system-on-chip design process, enabling the development of future generations of multi-core, mixed-signal SoCs, while contributing towards the advancement and diversity of the science and engineering workforce.

CPA-DA：下一代多核 SoC 中噪声管理的集成方法提案编号 0811317PI：Eby G. Friedman 罗切斯特大学摘要该项目的重点是开发一种用于管理噪声的集成方法，该方法解决了不同噪声源之间的多重交互问题支持下一代多核混合信号片上系统 (SoC) 的设计。将开发准确且计算高效的噪声模型，并将其与降噪技术相结合，以有效控制系统内的信号特性。利用通信中的经典噪声传播模型，将应用一种新颖的统一方法对不同系统组件之间的噪声生成、传播和接收进行建模，支持聚合噪声消除技术的开发。将研究减轻多种噪声源影响的设计权衡，并制定设计指南。我们将研究器件、电路和多核级别的不同噪声影响之间的相互依赖性，并开发最大限度地减少混合信号组件噪声的设计策略。重点将放在负责在不同系统组件之间生成和传播噪声的全局特征，例如配电网络、全局互连线、内核间同步方案和硅基板。还将研究噪声模型和降低技术对过程和环境变化的敏感性。最终目标是，在该项目完成后，将更好地理解由于多核 SoC 中的多重噪声效应而导致的模拟电路中的信号不确定性和数字电路中的延迟不确定性，并以计算高效的方式准确建模，同时集成降噪方法将开发用于设计下一代高复杂性、高性能集成电路。这些研究成果将为针对更广泛学术界的大学教学和研究活动的教育举措提供新的方向。展示研究成果实践方面的本科项目将与研究生合作设计。与该研究相关的课程将被开发并提供给具有不同背景的研究生和高年级本科生。将准备一个教程以在主要会议上演示。 PI 还将参加一项旨在提高工程和科学研究生项目少数族裔入学率的大学计划。该项目的智力和社会目标旨在大大超越片上系统设计流程中的现有限制，实现下一代多核、混合信号 SoC 的开发，同时为芯片技术的进步和多样性做出贡献。科学和工程劳动力。