Collaborative Research:Design, Modeling, Automation and Experimentation of Nanoscale Computing Fabric using Carbon Nanotubes

合作研究：使用碳纳米管的纳米级计算结构的设计、建模、自动化和实验

• 批准号: 0726791
• 负责人: Subhasish Mitra
• 金额: $ 62万
• 依托单位: Stanford University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-10-01 至 2011-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0726791&HistoricalAwards=false
• 关键词: Collaborative; Research; Design; Modeling; Automation

Device scaling of silicon transistors has been the fundamental basis for the phenomenal success of the semiconductor industry.Such scaling is reaching a point where it is absolutely necessary to explore new devices as replacement for traditional silicon transistors.Otherwise, the progress of the semiconductor industry will be severely affected. Carbon Nanotube Field-Effect Transistors (CNFETs) are promising candidates as extensions to traditional Silicon transistors due to excellent device performance. While there have been significant accomplishments in scientific discovery of CNFETs in recent years at the single-device level, a major gap exists between such single-device-level results and the research required to harness the science into practical design technologies at the end of device scaling of silicon transistors. This research project targets to close this gap by developing necessary technologies required to make CNFETs practical candidates for replacing silicon transistors.The objective of this research is to design of robust nanoscale computing fabrics using Carbon Nanotube Field Effect Transistors (CNFETs) in the presence of inherent limitations and imperfections, and to experimentally demonstrate essential components of a fabric such as a processor. This research is motivated by the fact that CNFETs are promising candidates as extensions to Silicon CMOS, yet fundamental nanoscale challenges prevent successful implementations of efficient CNFET-based circuits and systems. This project includes an interdisciplinary research team to demonstrate robust CNFET-based computing fabrics, and also to educate future generations of engineers and the general public in the emerging field of nanoscale computing.

硅晶体管的设备缩放一直是半导体行业成功取得惊人成功的基本基础。缩放量的缩放达到了一个绝对有必要探索新设备作为替代传统硅晶体管的地步。否则，半导体行业的进步将受到偏换影响。碳纳米管现场效应晶体管（CNFET）是有前途的候选者，这是由于良好的设备性能而作为传统硅晶体管的扩展。尽管近年来在单个设备级别的科学发现CNFET方面取得了重大成就，但这种单个设备级的结果与在硅晶体管设备扩展的末端将科学纳入实用设计技术所需的研究之间存在一个主要的差距。该研究项目的目标是通过开发使CNFETS更换硅晶体管的实际候选所需的必要技术来缩小这一差距。该研究的目的是在存在固有的限制和不完美的组合中，使用碳纳米管现场效应晶体管（CNFET）设计强大的纳米级计算织物（CNFET）的织物。这项研究是由于CNFET作为硅CMO的扩展而有希望的候选人的动机，但基本的纳米级挑战阻止了成功实施有效的基于CNFET的电路和系统。该项目包括一个跨学科研究团队，旨在展示基于CNFET的强大计算织物，并在纳米级计算的新兴领域中教育后代工程师和公众。