CSR---AES: Collaborative Research: Novel Programming Models and Architectures to Simplify Parallel Programming

CSR---AES：协作研究：简化并行编程的新颖编程模型和架构

• 批准号: 0720593
• 负责人: Josep Torrellas
• 金额: $ 88.99万
• 依托单位: University of Illinois at Urbana-Champaign
• 依托单位国家: 美国
• 项目类别: Continuing Grant
• 财政年份: 2007
• 资助国家: 美国
• 起止时间: 2007-10-01 至 2011-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=0720593&HistoricalAwards=false
• 关键词: CSR; AES; Collaborative; Research; Novel; CSR; AES; Collaborative; Research; Novel

The focus of this project is on the programming of multi-core chips. The goal of the project is to find a comprehensive parallel programming environment that can substantially simplify parallel programming for multi-cores.Current parallel programming approaches are typically too complicated for most programmers or do not deliver adequate performance. A major breakthrough is needed to simplify parallel programming to effectively utilize multi-core hardware. Reducing the complexity of parallel programming and enabling its widespread use has emerged as a Grand Research Challenge for the systems community. It is fundamental to the computer industry''s ability to continue innovating. The scope of this project is to study two novel parallel programming models that either separately or in combination have the potential to provide dramatic improvements in programmer productivity. The two novel parallel programming models that may have the potential to simplify parallel programming and be accepted by large numbers of programmers are Colorama and IPOT.Colorama is an architecture-supported Data Centric Synchronization (DCS) approach, and is used in explicitly parallel programs. In DCS, the programmer specifies concurrency control by associating synchronization constraints with the program data structures, typically when they are declared or allocated. These constraints determine which sets of data structures are in the same data consistency domain and, therefore, should be kept consistent with each other. At run time, when one data structure is being modified by a thread, the system automatically protects all the other data structures in the same domain from access by other threads. Compared to programming with locks and transactions, where the programmer reasons non-locally, Colorama has a significant programmability advantage: the programmer reasons locally, focusing only on what data structures should be consistent with each other; the system will automatically infer the critical sections.Implicit Parallelism with Ordered Transactions (IPOT) supports speculative threads in a sequential thread of execution. The key idea is that the programmer is allowed to specify opportunities for parallelization within the sequential thread using a set of simple yet very powerful annotations. Unlike explicit parallelism, IPOT annotations do not require the programmer or the compiler to prove the absence of data or control dependences. There is runtime architectural support to detect violations, and squash and restart threads. Unlike conventional TLS, the system can extract much more parallelism because it leverages user information. It is possible to use these models separately or, since they are complementary, in combination for example, by using Colorama on explicitly-parallel code where each thread is implicitly parallelized with IPOT. Both models require special hardware support in the multi-core chip.The project teams activities address several layers of multi-core programming/architectural frameworks:1. Programming Models -- The project team will study the design issues in the specification of the Colorama, IPOT, and Unified programming models (Unified is the combination of Colorama and IPOT).2. Compilation -- The team will develop compiler technology to improve the performance and guarantee the correctness of their programming models.3. Runtime System -- Libraries and a runtime system will be developed for these models.4. Computer Architecture -- Different levels of architectural support for these models will be explored.5. Performance Monitoring and Debugging Tools -- A set of tools will be developed that allow programmers to debug, test, and tune programs written for the programming models.6. Applications -- A suite of applications will be developed that use the programming models.7. Empirical Productivity Studies -- A set of empirical programmer productivity experiments will be carried out in a course at the University of Illinois.This work involves a collaboration between the University of Illinois and IBM Research, leveraging a large amount of existing IBM-sponsored infrastructure to release the complete software infrastructure of the programming environment that is developed by the project team.

该项目的重点是多核芯片的编程。该项目的目的是找到一个综合的并行编程环境，该环境可以实质上简化多核的并行编程。对于大多数程序员而言，通行的并行编程方法通常太复杂了，或者不提供足够的性能。需要一个重大突破来简化并行编程以有效地利用多核硬件。降低并行编程的复杂性并实现其广泛使用，已成为系统社区的大型研究挑战。这对于计算机行业继续创新的能力至关重要。该项目的范围是研究两个新型的并行编程模型，它们分别或组合有可能提高程序员生产率。两个新型的并行编程模型可能有可能简化并行编程的潜力，并被大量程序员接受。Colorama和Ipot.Colorama是一种以架构为中心的以数据为中心的数据中心同步（DCS）方法，可用于显式并行程序。在DC中，程序员通过将同步约束与程序数据结构相关联，通常在声明或分配时指定并发控制。这些约束确定了哪些数据结构在相同的数据一致性域中，因此应保持彼此一致。在运行时，当一个数据结构通过线程修改时，系统会自动保护同一域中的所有其他数据结构免受其他线程的访问。与锁和交易的编程相比，程序员在非局部原因的原因是，Colorama具有显着的可编程性优势：程序员在本地的原因，仅关注哪些数据结构应彼此一致；该系统将自动推断关键部分。与有序交易（IPOT）的IMPlicit并行性支持在执行顺序线程中的投机线。关键的想法是，允许程序员使用一组简单但非常强大的注释在顺序线程中指定并行化的机会。与显式并行性不同，IPOT注释不需要程序员或编译器证明缺乏数据或控制依赖性。有运行时的架构支持来检测违规行为，壁球和重新启动线程。与传统的TL不同，系统可以提取更多的并行性，因为它利用用户信息。可以单独使用这些模型，或者，由于它们是互补的，例如结合使用，例如，通过在显式平行的代码上使用Colorama，其中每个线程与IPOT隐式并行化。两种模型都需要在多核芯片中进行特殊的硬件支持。项目团队活动介绍了多核编程/架构框架的几层：1。编程模型 - 项目团队将研究Colorama，IPOT和统一编程模型规范中的设计问题（统一是Colorama和Ipot的组合）。2。编译 - 团队将开发编译器技术以提高性能并保证其编程模型的正确性3。运行时系统 - 将为这些模型开发库和运行时系统4。计算机架构 - 将探索这些模型的不同级别的体系结构支持5。性能监视和调试工具 - 将开发一组工具，使程序员可以为编程模型编写调试，测试和调音程序6。应用程序 - 将开发一套使用编程模型的应用程序7。实证生产力研究 - 将在伊利诺伊大学的一门课程中进行一系列经验的程序员生产力实验。这项工作涉及伊利诺伊大学和IBM研究之间的合作，并利用了大量现有的IBM IBM利用基础结构来释放由项目团队开发的完整软件基础设施。